UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 386

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
7.6.8 Time required for switchover of CPU clock and main system clock
clock can be switched (between the main system clock and the subsystem clock), main system clock can be switched
(between the internal high-speed oscillation clock and the high-speed system clock), and the division ratio of the main
system clock can be changed.
on the pre-switchover clock for several clocks (see Table 7-6 to Table 7-9).
the CKC register. Whether the main system clock is operating on the high-speed system clock or internal high-speed
oscillation clock can be ascertained using bit 5 (MCS) of the CKC register.
Note The 78K0R/KC3-L (40-pin) doesn’t have the subsystem clock.
(Remarks 1 and 2 are listed on the next page.)
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
By setting bits 0 to 2, 4, and 6 (MDIV0 to MDIV2, MCM0, CSS) of the system clock control register (CKC), the CPU
The actual switchover operation is not performed immediately after rewriting to the CKC register; operation continues
Whether the CPU is operating on the main system clock or the subsystem clock can be ascertained using bit 7 (CLS) of
When the CPU clock is switched, the peripheral hardware clock is also switched.
Table 7-7. Maximum Number of Clocks Required for f
(f
Set Value Before Switchover
Set Value Before Switchover
(f
MAIN
MAIN
Clock A
f
f
0
1
MAIN
MAIN
f
= f
= f
IH
MX
Table 7-6. Maximum Time Required for Main System Clock Switchover
IH
Clock A
Clock B
)
MCM0
)
Table 7-8. Maximum Number of Clocks Required for f
f
f
f
f
MX
MX
MX
MX
(changing the division ratio)
≥f
<f
≥f
<f
IH
IH
IH
IH
Switching directions
1 + f
2f
1 + f
MX
/f
B
MX
IH
/f
/f
A
clock
IH
clock
clock
(f
Clock A
MAIN
0
= f
IH
Set Value After Switchover
Set Value After Switchover
)
MAIN
Clock B
f
SUB
f
MCM0
MAIN
f
↔ f
MX
Note
1 + f
1 + f
2f
MAIN
IH
/f
A
IH
MX
CHAPTER 7 CLOCK GENERATOR
/f
(Changing the Division Ratio)
/f
B
MX
clock
clock
clock
(f
See Table 7-7
See Table 7-8
See Table 7-9
IH
MAIN
Clock B
↔ f
1
= f
MX
Remark
MX
)
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