UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 226

no-image

UPD78F1000GB-GAF-AX

Manufacturer Part Number
UPD78F1000GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet

Specifications of UPD78F1000GB-GAF-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1000GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0R/Kx3-L
5.2.12 Port 15
Remark √: Mounted
mode register 15 (PM15).
configuration register (ADPC) and in the input mode by using the PM15 register. Use these pins starting from the lower bit.
and in the output mode by using the PM15 register.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
P150/ANI8
P151/ANI9
P152/ANI10
P153/ANI11
Port 15 is an I/O port with an output latch. Port 15 can be set to the input mode or output mode in 1-bit units using port
This port can also be used for A/D converter analog input.
To use P150/ANI8 to P153/ANI11 as digital input pins, set them in the digital I/O mode by using the A/D port
To use P150/ANI8 to P153/ANI11 as digital output pins, set them in the digital I/O mode by using the ADPC register
All P150/ANI8 to P153/ANI11 are set in the digital input mode when the reset signal is generated.
Figure 5-27 shows block diagram of port 15.
Caution Make the AV
Digital I/O selection
Analog input selection
ADPC Register
(
μ PD78F100y: y = 0 to 3)
40-pin
78K0R/KC3-L
REF
Table 5-6. Setting Functions of P150/ANI8 to P153/ANI11 Pins
pin the same potential as the V
CHAPTER 5 PORT FUNCTIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
Input mode
Output mode
Input mode
Output mode
44-pin
PM15 Register
(
μ PD78F100y: y = 1 to 3)
78K0R/KC3-L (48-pin)
Selects ANI.
Does not select ANI.
Selects ANI.
Does not select ANI.
ADS Register
DD
pin when port 15 is used as a digital port.
(
μ PD78F100y: y = 4 to 6)
78K0R/KD3-L
Digital input
Digital output
Analog input (to be converted)
Analog input (not to be converted)
Setting prohibited
P150/ANI8 to P153/ANI11 Pins
(
μ PD78F100y: y = 7 to 9)
78K0R/KE3-L
226

Related parts for UPD78F1000GB-GAF-AX