UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 950

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
(2) When detecting level of input voltage from external input pin (EXLVI)
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
• When starting operation
• When stopping operation
Figure 23-7 shows the timing of the internal reset signal generated by the low-voltage detector. The numbers in
this timing chart correspond to <1> to <6> above.
Cautions 1. Be sure to execute <1>. When LVIMK = 0, an interrupt may occur immediately after the
Be sure to clear (0) the LVIMD bit and then the LVION bit by using a 1-bit memory manipulation instruction.
<1>
<2>
<3>
<4>
<5>
<6>
Mask the LVI interrupt (LVIMK = 1).
Set bit 2 (LVISEL) of the low-voltage detection register (LVIM) to 1 (detects level of input voltage from the
external input pin (EXLVI)).
Set bit 7 (LVION) of the LVIM register to 1 (enables LVI operation).
Use software to wait for the following periods of time (Total 210
Wait until it is checked that (input voltage from the external input pin (EXLVI) ≥ detection voltage (V
1.21 V (TYP.))) by bit 0 (LVIF) of the LVIM register.
Set bit 1 (LVIMD) of the LVIM register to 1 (generates reset signal when the level is detected).
• Operation stabilization time (10
• Minimum pulse width (200
2. If input voltage from the external input pin (EXLVI) ≥ detection voltage (V
3. Input voltage from the external input pin (EXLVI) must be EXLVI < V
processing in <3>.
when the LVIMD bit is set to 1, an internal reset signal is not generated.
μ
s (MIN.))
μ
s (MAX.))
CHAPTER 23 LOW-VOLTAGE DETECTOR
μ
s).
DD
.
EXLVI
= 1.21 V (TYP.))
EXLVI
950
=