UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 1166

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Current
Version
(U20024E)
2nd edition
Edition
Addition of the 78K0R/KC3-L (40-pin), 78K0R/KF3-L (
78K0R/KG3-L (
78K0R/KC3-L (48-pin) and 78K0R/KE3-L (64-pin).
Addition of the 78K0R/KC3-L (40-pin), 78K0R/KF3-L (
78K0R/KG3-L (
78K0R/KC3-L (48-pin) and 78K0R/KE3-L (64-pin).
Addition of the 78K0R/KC3-L (40-pin) products. Addition of WQFN package to
78K0R/KC3-L (48-pin) and 78K0R/KE3-L (64-pin).
Addition of the 78K0R/KF3-L (
PD78F1029, 78F1030) products. Addition of the SCK40, SCK41, SI40, SI41, SO40,
SO41, TxD4, and RxD4 pins.
Addition of the 78K0R/KC3-L (40-pin), 78K0R/KF3-L (
78K0R/KG3-L (
the serial allay unit 2 to SFR and extended SFR.
Change of Note in Figure 4-1 to Figure 4-9. Memory Map
Change of Table 4-3. Vector Table
Change of Note in Figure 4-11 to Figure 4-19. Correspondence Between Data
Memory and Addressing
Addition of the 78K0R/KC3-L (40-pin) products. Addition of WQFN package to
78K0R/KC3-L (48-pin) and 78K0R/KE3-L (64-pin).
Addition of the 78K0R/KF3-L (
PD78F1029, 78F1030) products. Addition of the SCK40, SCK41, SI40, SI41, SO40,
SO41, TxD4, and RxD4 pins.
Addition of the 78K0R/KC3-L (40-pin), 78K0R/KF3-L (
78K0R/KG3-L (
subsystem clock and PER register.
Change of description of the 7.3 (8) Operation speed mode control register (OSMC).
Change of description of the RTCLPC bit in Figure 7-12. Format of Operation Speed
Mode Control Register (OSMC)
Change of Caution 6 in Figure 7-12. Format of Operation Speed Mode Control
Register (OSMC)
Addition of the 78K0R/KC3-L (40-pin). Change of the description related to the timer
input pin (TImn) and timer output pin (TOmn).
Addition of the description related to the 78K0R/KC3-L (40-pin) product.
Addition of the 78K0R/KC3-L (40-pin). Addition of the note and remark related to the
positive-side input pin 1 (CMP1P).
μ
μ
μ
μ
PD78F1029, 78F1030) products. Addition of WQFN package to
PD78F1029, 78F1030) products. Addition of WQFN package to
PD78F1029, 78F1030) products. Addition of the register related to
PD78F1029, 78F1030) products. Addition of the description related to
μ
μ
PD78F1027, 78F1028), and 78K0R/KG3-L (
PD78F1027, 78F1028), and 78K0R/KG3-L (
Description
μ
μ
μ
μ
PD78F1027, 78F1028), and
PD78F1027, 78F1028), and
PD78F1027, 78F1028), and
PD78F1027, 78F1028), and
APPENDIX B REVISION HISTORY
μ
μ
Thrughout
CHAPTER 1 OUTLINE
CHAPTER 2 PIN
FUNCTIONS
(78K0R/KC3-L,
78K0R/KD3-L,
78K0R/KE3-L)
CHAPTER 3 PIN
FUNCTIONS
(78K0R/KF3-L,
78K0R/KG3-L)
CHAPTER 4 CPU
ARCHITECTURE
CHAPTER 5 PORT
FUNCTIONS
(78K0R/KC3-L,
78K0R/KD3-L,
78K0R/KE3-L)
CHAPTER 6 PORT
FUNCTIONS
(78K0R/KF3-L,
78K0R/KG3-L)
CHAPTER 7 CLOCK
GENERATOR
CHAPTER 8 TIMER
ARRAY UNIT
CHAPTER 9 REAL-TIME
COUNTER
CHAPTER 10
COMPARATORS/PROG
RAMMABLE GAIN
AMPLIFIERS
(78K0R/KC3-L,
78K0R/KD3-L,
78K0R/KE3-L only)
Chapter
(4/6)
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