UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 233

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
(2) Port registers (Pxx)
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Symbol
P12
P15
P1
P2
P3
P4
P5
P7
P8
These registers set the output latch value of a port.
If the data is read in the input mode, the pin level is read. If it is read in the output mode, the output latch value is
read
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Note It is always 0 and never a pin level that is read out if a port is read during the input mode when P2 and P15 are
Note
Note P121 and P122 are read-only.
set to function as an analog input for a A/D converter.
.
Pmn
P27
7
0
0
0
0
0
0
0
0
0
1
Output 0
Output 1
P26
6
0
0
0
0
0
0
0
0
Output data control (in output mode)
Figure 5-32. Format of Port Register (78K0R/KC3-L (40-pin))
P25
P75
CHAPTER 5 PORT FUNCTIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
5
0
0
0
0
0
0
0
P24
P74
4
0
0
0
0
0
0
0
P13
P23
P73
P83
3
0
0
0
0
0
m = 1 to 8, 12, 14, 15 ; n = 0 to 7
P122
P12
P22
P32
P72
2
0
0
0
0
Input low level
Input high level
P121
P151
P11
P21
P31
P41
P51
P71
P81
1
Input data read (in input mode)
P120
P150
P10
P20
P30
P40
P50
P70
P80
0
FFF0CH
Address
FFF01H
FFF02H
FFF03H
FFF04H
FFF05H
FFF07H
FFF08H
FFF0FH
00H (output latch) R/W
00H (output latch) R/W
00H (output latch) R/W
00H (output latch) R/W
00H (output latch) R/W
00H (output latch) R/W
00H (output latch) R/W
00H (output latch) R/W
After reset
Undefined
R/W
R/W
Note2
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