UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 583

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
14.1.3 Simplified I
(SCL) and serial data (SDA). This simplified I
flash memory, or A/D converter, and therefore, it functions only as a master.
conditions are observed.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
This is a clocked communication function to communicate with two or more devices by using two lines: serial clock
Make sure by using software, as well as operating the control registers, that the AC specifications of the start and stop
For details about the settings, see 14.8 Operation of Simplified I
[Data transmission/reception]
[Interrupt function]
[Error detection flag]
* [Functions not supported by simplified I
Note When receiving the last data, ACK will not be output if 0 is written to the SOEmn bit (serial output enable register
Remark
• Master transmission, master reception (only master function with a single master)
• ACK output function
• Data length of 8 bits (When an address is transmitted, the address is specified by the higher 7 bits, and the least
• Manual generation of start condition and stop condition
• Transfer end interrupt
• Parity error (ACK error)
• Slave transmission, slave reception
• Arbitration loss detection function
• Wait detection functions
significant bit is used for R/W control.)
m (SOEm)) and serial communication data output is stopped. See the processing flow in 14.8.3 (2) for details.
To use an I
2
C (IIC10, IIC20)
2
C bus of full function, see CHAPTER 15 SERIAL INTERFACE IICA.
Note
and ACK detection function
2
C]
2
C is designed for single communication with a device such as EEPROM,
2
C (IIC10, IIC20)
CHAPTER 14 SERIAL ARRAY UNIT
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