UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 566

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
(8) Port mode registers 2, 15, and 8
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Address: FFF28H
Address: FFF2FH
Symbol
Symbol
Symbol
Address: FFF22H
PM15
PM2
PM8
Note
Caution If a pin is set as an analog input port, not the pin level but “0” is always read.
Remark P20/ANI0 to P27/ANI7, P150/ANI8, P151/ANI9:
When using the ANI0/P20 to ANI7/P27, ANI8/P150 to ANI15/P157, and PGAI/P80 pins for analog input port, set the
PM20 to PM27, PM150 to PM157, and PM80 bits to 1. The output latches of P20 to P27, P150 to P157, and P80 at
this time may be 0 or 1.
If the PM20 to PM27, PM150 to PM157, and PM80 bits are set to 0, they cannot be used as analog input port pins.
The PM2, PM15, and PM8 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets these registers to FFH.
Remark
Port mode register 8 is set only in the 78K0R/KC3-L, 78K0R/KD3-L, and 78K0R/KE3-L.
PM27
Figure 13-11. Formats of Port Mode Registers 2, 15, and 8 (PM2, PM15, PM8) (78K0R/KE3-L)
PMmn
P20/ANI0 to P27/ANI7, P150/ANI8 to P152/ANI10: 78K0R/KC3-L (48-pin) and 78K0R/KD3-L
P20/ANI0 to P27/ANI7, P150/ANI8 to P153/ANI11: 78K0R/KE3-L, 78K0R/KF3-L
P20/ANI0 to P27/ANI7, P150/ANI8 to P157/ANI15: 78K0R/KG3-L
7
7
7
1
1
0
1
After reset: FFH
After reset: FFH
The figure shown above presents the format of port mode registers 2, 8 and 15 of the 78K0R/KE3-L
product. See below for the format of the port mode registers of other products.
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L: 5.3 (1) Port mode registers (PMxx).
78K0R/KF3-L, 78K0R/KG3-L:
After reset: FFH
Output mode (output buffer on)
Input mode (output buffer off)
PM26
6
6
1
6
1
R/W
R/W
R/W
PM25
Pmn pin I/O mode selection (mn = 20 to 27, 150 to 153, 80 to 83)
Note
5
5
1
5
1
(PM2, PM15, PM8
PM24
4
4
1
4
1
Note
)
PM153
PM23
PM83
6.3 (1) Port mode registers (PMxx).
78K0R/KC3-L (40-pin, 44-pin)
3
3
3
PM152
PM22
PM82
2
2
2
CHAPTER 13 A/D CONVERTER
PM151
PM21
PM81
1
1
1
PM150
PM20
PM80
0
0
0
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