UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 568

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
13.4 A/D Converter Operations
13.4.1 Basic operations of A/D converter
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
<1> Set bit 5 (ADCEN) of peripheral enable register 0 (PER0) to 1 to start the supply of the input clock to the A/D
<2> Set the A/D conversion time by using bits 5 to 1 (FR2 to FR0, LV1, and LV0) of the A/D converter mode register
<3> Set bit 0 (ADCE) of the ADM register to 1 to start the operation of the A/D voltage comparator.
<4> Set the channels for A/D conversion to analog input by using the A/D port configuration register (ADPC) and set
<5> Set the programmable gain amplifier operation to set the programmable gain amplifier output (PGAI pin) for the
<6> Select one channel for A/D conversion using the analog input channel specification register (ADS).
<7> Start the conversion operation by setting bit 7 (ADCS) of the ADM register to 1.
<8> The voltage input to the selected analog input channel is sampled by the sample & hold circuit.
<9> When sampling has been done for a certain time, the sample & hold circuit is placed in the hold state and the
<10> Bit 9 of the successive approximation register (SAR) is set. The series resistor string voltage tap is set to (1/2)
<11> The voltage difference between the series resistor string voltage tap and sampled voltage is compared by the
<12> Next, bit 8 of the SAR register is automatically set to 1, and the operation proceeds to the next comparison. The
<13> Comparison is continued in this way up to bit 0 of the SAR register.
<14> Upon completion of the comparison of 10 bits, an effective digital result value remains in the SAR register, and
<15> Repeat steps <8> to <14>, until the ADCS bit is cleared to 0.
Caution Make sure the period of <3> to <7> is 1
Remark Two types of the A/D conversion result registers are available.
converter.
(ADM), and set the operation mode by using bit 6 (ADMD) of the ADM register.
to input mode by using the port mode registers (PM2, PM15, and PM8).
analog input channel (refer to 10.4.1 Starting comparator and programmable gain amplifier operation).
(<8> to <14> are operations performed by hardware.)
sampled voltage is held until the A/D conversion operation has ended.
AV
voltage comparator. If the analog input is greater than (1/2) AV
to 1. If the analog input is smaller than (1/2) AV
series resistor string voltage tap is selected according to the preset value of bit 9, as described below.
• Bit 9 = 1: (3/4) AV
• Bit 9 = 0: (1/4) AV
The voltage tap and sampled voltage are compared and bit 8 of the SAR register is manipulated as follows.
• Sampled voltage ≥ Voltage tap: Bit 8 = 1
• Sampled voltage < Voltage tap: Bit 8 = 0
the result value is transferred to the A/D conversion result register (ADCR, ADCRH) and then latched.
At the same time, the A/D conversion end interrupt request (INTAD) can also be generated.
To stop the A/D converter, clear the ADCS bit to 0.
To restart A/D conversion from the status of ADCE = 1, start from <7>. To start A/D conversion again when
ADCE = 0, set the ADCE bit to 1, wait for 1
start from <6>.
REF
• ADCR register (16 bits):
• ADCRH register (8 bits):
by the tap selector.
REF
REF
Store 10-bit A/D conversion value
Store 8-bit A/D conversion value
μ
s or longer, and start <7>. To change a channel of A/D conversion,
μ
REF
s or more.
, the MSB bit is reset to 0.
REF
, the MSB bit of the SAR register remains set
CHAPTER 13 A/D CONVERTER
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