UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 870

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
<In case of the 78K0R/KC3-L, KD3-L, KE3-L>
<In case of the 78K0R/KF3-L, KG3-L>
18.1 Interrupt Function Types
(1) Maskable interrupts
(2) Software interrupt
18.2 Interrupt Sources and Configuration
sources (see Table 18-1). The vector codes that store the program start address when branching due to the generation of
a reset or various interrupt requests are two bytes each, so interrupts jump to a 64 K address of 00000H to 0FFFFH.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Maskable
interrupts
Maskable
interrupts
The number of interrupt sources differs, depending on the product.
The following two types of interrupt functions are used.
Interrupt sources include maskable interrupts and software interrupts. In addition, they also have up to five reset
These interrupts undergo mask control. Maskable interrupts can be divided into four priority groups by setting the
priority specification flag registers (PR00L, PR00H, PR01L, PR01H, PR02L, PR02H, PR10L, PR10H, PR11L, PR11H,
PR12L, PR12H).
Multiple interrupt servicing can be applied to low-priority interrupts when high-priority interrupts are generated. If two
or more interrupt requests, each having the same priority, are simultaneously generated, then they are processed
according to the priority of vectored interrupt servicing. For the priority order, see Table 18-1.
A standby release signal is generated and STOP and HALT modes are released.
External interrupt requests and internal interrupt requests are provided as maskable interrupts.
This is a vectored interrupt generated by executing the BRK instruction. It is acknowledged even when interrupts are
disabled. The software interrupt does not undergo interrupt priority control.
External
External
Internal
Internal
(
78K0R/KC3-L
μ
PD78F10xx : xx =
(40-pin)
10, 11, 12)
22
8
33
CHAPTER 18 INTERRUPT FUNCTIONS
78K0R/KF3-L
78K0R/KC3-L
(44-pin)
(
μ
24
9
PD78F10xx : xx =
27, 28)
35
78K0R/KC3-L
(48-pin)
25
13
9
(
μ
CHAPTER 18 INTERRUPT FUNCTIONS
PD78F10xx : xx =
13, 14)
33
78K0R/KD3-L
78K0R/KG3-L
25
9
(
μ
PD78F10xx : xx =
78K0R/KE3-L
29, 30)
35
25
9
870