UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 712

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
14.7 LIN Communication Operation
14.7.1 LIN transmission
78K0R/KG3-L support LIN communication.
Notes 1. 78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L: UART0
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Remarks 1. f
Of UART transmission, UART0 of the 78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L and UART3 of the 78K0R/KF3-L,
The following UART channels are used for LIN transmission.
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L: Channel 0 of SAU0
78K0R/KF3-L, 78K0R/KG3-L:
Support of LIN communication
Target channel
Pins used
Interrupt
Error detection flag
Transfer data length
Transfer rate
Data phase
Parity bit
Stop bit
Data direction
2. UART4 is only mounted in the 78K0R/KF3-L (
3. Use this operation within a range that satisfies the conditions above and the AC characteristics in the electrical
78K0R/KF3-L, 78K0R/KG3-L:
78F1030).
specifications (see CHAPTER 30
78K0R/KE3-L), CHAPTER 31 ELECTRICAL SPECIFICATIONS (78K0R/KF3-L, 78K0R/KG3-L)).
2. m: Unit number (m = 0, 1), n: Channel number (n = 0, 2)
f
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L: mn = 00
78K0R/KF3-L, 78K0R/KG3-L:
MCK
CLK
UART
:
:
Operation clock frequency of target channel
System clock frequency
Supported
Channel 0 of
SAU0
TxD0
INTST0
Transfer end interrupt (in single-transfer mode) or buffer empty interrupt (in continuous transfer
mode) can be selected.
None
8 bits
Max. f
Forward output (default: high level)
Reverse output (default: low level)
The following selectable
• No parity bit
• Appending 0 parity
• Appending even parity
• Appending odd parity
The following selectable
• Appending 1 bit
• Appending 2 bits
MSB or LSB first
UART0
MCK
/6 [bps] (SDRmn [15:9] = 2 or more), Min. f
Note 1
Channel 2 of SAU1
ELECTRICAL SPECIFICATIONS (78K0R/KC3-L, 78K0R/KD3-L,
Not supported
UART3
UART1
μ
−
−
−
mn = 12
PD78F1027, 78F1028) and 78K0R/KG3-L (
Not supported
UART2
−
−
−
CHAPTER 14 SERIAL ARRAY UNIT
CLK
/(2 × 2
Supported
Channel 2 of
SAU1
TxD3
INTST3
11
UART3
× 128) [bps]
Note 1
Note 3
Not supported
μ
UART4
PD78F1029,
−
−
−
Note 2
712