UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 14

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CHAPTER 14 SERIAL ARRAY UNIT.................................................................................................. 580
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
14.1 Functions of Serial Array Unit................................................................................................. 581
14.2 Configuration of Serial Array Unit .......................................................................................... 584
14.3 Registers Controlling Serial Array Unit.................................................................................. 591
14.4 Operation stop mode ............................................................................................................... 622
14.5 Operation of 3-Wire Serial I/O (CSI00, CSI01, CSI10, CSI20, CSI40, CSI41) Communication..... 627
14.6 Operation of UART (UART0 to UART4) Communication...................................................... 688
14.7 LIN Communication Operation ............................................................................................... 712
14.8 Operation of Simplified I
14.9 Relationship Between Register Settings and Pins ............................................................... 743
14.1.1 3-wire serial I/O (CSI00, CSI01, CSI10, CSI20, CSI40, CSI41) ................................................... 581
14.1.2 UART (UART0 to UART4)............................................................................................................ 582
14.1.3 Simplified I
14.4.1 Stopping the operation by units .................................................................................................... 623
14.4.2 Stopping the operation by channels ............................................................................................. 625
14.5.1 Master transmission ..................................................................................................................... 629
14.5.2 Master reception........................................................................................................................... 639
14.5.3 Master transmission/reception...................................................................................................... 648
14.5.4 Slave transmission ....................................................................................................................... 658
14.5.5 Slave reception............................................................................................................................. 668
14.5.6 Slave transmission/reception........................................................................................................ 675
14.5.7 Calculating transfer clock frequency............................................................................................. 685
14.5.8 Procedure for processing errors that occurred during 3-wire serial I/O (CSI00, CSI01, CSI10, CSI20,
14.6.1 UART transmission ...................................................................................................................... 690
14.6.2 UART reception............................................................................................................................ 700
14.6.3 Calculating baud rate ................................................................................................................... 707
14.6.4 Procedure for processing errors that occurred during UART (UART0 to UART4) communication...... 711
14.7.1 LIN transmission........................................................................................................................... 712
14.7.2 LIN reception ................................................................................................................................ 715
14.8.1 Address field transmission............................................................................................................ 723
14.8.2 Data transmission......................................................................................................................... 729
14.8.3 Data reception .............................................................................................................................. 733
14.8.4 Stop condition generation............................................................................................................. 738
14.8.5 Calculating transfer rate ............................................................................................................... 739
14.8.6 Procedure for processing errors that occurred during simplified I
14.9.1 78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L ............................................................................... 743
CSI40, CSI41) communication..................................................................................................... 687
2
C (IIC10, IIC20).......................................................................................................... 583
2
C (IIC10, IIC20) Communication ................................................... 721
2
C (IIC10, IIC20) communication......742
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