UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 682

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Cautions 1.
Figure 14-71. Flowchart of Slave Transmission/Reception (in Single- Transmission/Reception Mode)
2.
After setting the SAUmEN bit of peripheral enable register 0/1 (PER0/PER1) to 1, be sure to
set serial clock select register m (SPSm) after 4 or more f
Be sure to set transmit data to the SlOp register before the clock from the master is started.
SDRmn[15:9]:
SOm, SOEm:
SMRmn, SCRmn:
Clearing the SAUmEN bit of the
Starting transmission/reception
Setting the SAUmEN bit of the
Setting transfer rate by the
Writing 1 to the SSmn bit
Writing 1 to the STmn bit
Starting CSI communication
Writing transmit data to
End of communication
PER0/PER1 register to 1
PER0/PER1 register to 0
SIOp (=SDRmn[7:0])
SIOp (=SDRmn[7:0])
Port manipulation
Transmission/reception
Transfer end interrupt
SPSm register
Yes
Yes
Reading the
completed?
generated?
register
Setting communication
Setting 0000000B
Setting output
No
No
Specify the initial settings while the
SEmn bit of serial channel enable
status register m (SEm) is 0 (operation
is stopped).
CHAPTER 14 SERIAL ARRAY UNIT
CLK
clocks have elapsed.
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