UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 331

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UPD78F1000GB-GAF-AX

Manufacturer Part Number
UPD78F1000GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet

Specifications of UPD78F1000GB-GAF-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1000GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0R/Kx3-L
6.4.4 Connecting to external device with different potential (2.5 V, 3 V)
2.5 V, 3 V power supply voltage are possible.
PIM14).
(V
(1) Setting procedure when using I/O pins of UART0 to UART2, CSI00, CSI10, and CSI20 functions
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
DD
When parts of ports 0, 1, 14 operate with V
Regarding inputs, CMOS/TTL switching is possible on a bit-by-bit basis by the port input mode registers (PIM0, PIM1,
Moreover, regarding outputs, different potentials can be supported by switching the output buffer to the N-ch open drain
withstand voltage) by the port output mode registers (POM0, POM1, POM14).
(a) Use as 2.5 V, 3 V input port
(b) Use as 2.5 V, 3 V output port
<1> After reset release, the port mode is the input mode (Hi-Z).
<2> If pull-up is needed, externally pull up the pin to be used (on-chip pull-up resistor cannot be used).
<3> Set the corresponding bit of the PIMn register to 1 to switch to the TTL input buffer.
<4> V
<1> After reset release, the port mode changes to the input mode (Hi-Z).
<2> Pull up externally the pin to be used (on-chip pull-up resistor cannot be used).
<3> Set the output latch of the corresponding port to 1.
<4> Set the corresponding bit of the POMn register to 1 to set the N-ch open drain output (V
<5> Set the output mode by manipulating the PMn register.
<6> Communication is started by setting the serial array unit.
At this time, the output data is high level, so the pin is in the Hi-Z state.
Remark n = 0, 1, 14
voltage) mode.
IH
/V
IL
In case of UART1:
In case of UART1:
In case of UART2:
In case of CSI00:
In case of CSI10:
In case of CSI20:
In case of UART0:
In case of UART1:
In case of UART2:
In case of CSI00:
In case of CSI10:
In case of CSI20:
operates on 2.5 V, 3 V operating voltage.
P11
P03
P143
P10, P11
P03, P04
P142, P143
P12
P02
P144
P10, P12
P02, P04
P142, P144
DD
CHAPTER 6 PORT FUNCTIONS (78K0R/KF3-L, 78K0R/KG3-L)
= 4.0 to 5.5 V, I/O connections with an external device that operates on
DD
withstand
331

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