HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 102

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 2 CPU
Table 2.7
Rev. 1.00 Dec. 27, 2005 Page 58 of 932
REJ09B0269-0100
Instruction
ADD
ADD
ADDC
ADDV
CMP/EQ
CMP/EQ
CMP/HS
CMP/GE
CMP/HI
CMP/GT
CMP/PL
CMP/PZ
CMP/STR Rm,Rn
DIV1
DIV0S
DIV0U
DMULS.L
DMULU.L
Rm,Rn
#imm,Rn
Rm,Rn
Rm,Rn
#imm,R0
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Rn
Rn
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Arithmetic Operation Instructions
Instruction Code
0011nnnnmmmm1100
0111nnnniiiiiiii
0011nnnnmmmm1110
0011nnnnmmmm1111
10001000iiiiiiii
0011nnnnmmmm0000
0011nnnnmmmm0010
0011nnnnmmmm0011
0011nnnnmmmm0110
0011nnnnmmmm0111
0100nnnn00010101
0100nnnn00010001
0010nnnnmmmm1100
0011nnnnmmmm0100
0010nnnnmmmm0111
0000000000011001
0011nnnnmmmm1101
0011nnnnmmmm0101
Operation
Rn+Rm→Rn
Rn+imm→Rn
Rn+Rm+T→Rn, Carry→T
Rn+Rm→Rn, Overflow→T
If R0 = imm, 1 → T
If Rn = Rm, 1 → T
If Rn ≥ Rm with unsigned data,
1 → T
If Rn ≥ Rm with signed data,
1 → T
If Rn > Rm with unsigned data,
1 → T
If Rn > Rm with signed data,
1 → T
If Rn ≥ 0, 1 → T
If Rn > 0, 1 → T
If Rn and Rm have an
equivalent byte, 1 → T
Single-step division (Rn/Rm)
MSB of Rn → Q, MSB of Rm
→ M, M ^ Q → T
0 → M/Q/T
Signed operation of Rn × Rm
→ MACH, MACL 32 × 32 →
64 bits
Unsigned operation of Rn ×
Rm → MACH, MACL 32 × 32
→ 64 bits
Privileged
Mode


















Cycles
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2 (to 5)* –
2 (to 5)* –
T Bit
–
–
Carry
Overflow
Compariso
n result
Compariso
n result
Compariso
n result
Compariso
n result
Compariso
n result
Compariso
n result
Compariso
n result
Compariso
n result
Compariso
n result
Calculation
result
Calculation
result
0