HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 324

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 9 User Break Controller
9.2.12
BRDR is a 32-bit read-only register. BRDR stores bits 27 to 0 in the address of the branch
destination instruction. BRDR has the flag bit that is set to 1 when a branch occurs. This flag bit is
cleared to 0 when BRDR is read, the setting to enable PC trace is made, or BRDR is initialized by
a power-on reset. Other bits are not initialized by a power-on reset. The eight BRDR registers
have a queue structure and a stored register is shifted at every branch.
9.2.13
BASRA is an 8-bit readable/writable register that specifies ASID which becomes the break
condition for channel A. BASRA is in CCN.
Rev. 1.00 Dec. 27, 2005 Page 280 of 932
REJ09B0269-0100
Bit
31
30 to 28
27 to 0
Bit
7 to 0
Bit Name
BASA7 to
BASA0
Branch Destination Register (BRDR)
Break ASID Register A (BASRA)
Bit Name
DVF
BDA27 to
BDA0
Initial
Value
Initial
Value
0
All 0
R/W
R/W
R/W
R
R
R
Description
Break ASID A
Store ASID (bits 7 to 0) which is the break condition for
channel A.
Description
BRDR Valid Flag
Indicates whether a branch destination address is
stored. When a branch destination address is fetched,
this flag is set to 1. This flag is cleared to 0 by reading
BRDR.
0: The value of BRDR register is invalid
1: The value of BRDR register is valid
Reserved
These bits are always read as 0. The write value
should always be 0.
Branch Destination Address
Store bits 27 to 0 of the branch destination address.

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