HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 663

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Table 17.5 Audio Mode Specification for Transmit Data
Note:
Table 17.6 Audio Mode Specification for Receive Data
Note: Left and right same audio mode is not supported in receive data.
Control Data: Control data is written to or read from by the following registers.
• Transmit control data write: SITCR (32-bit access)
• Receive control data read: SIRCR (32-bit access)
Figure 17.6 shows the control data and bit alignment in SITCR and SIRCR.
The number of channels in control data is specified by CD0E and CD1E bits in SICDAR. Table
17.7 shows the relationship between the number of channels in control data and bit settings. To
use only one channel in control data, use channel 0.
Mode
Monaural
Stereo
left and right same audio output
Mode
Monaural
Stereo
x: Don't care
(a) Control data: one channel
(b) Control data: two channel
31
31
Figure 17.6 Control Data Bit Alignment
Control data
Control data
(channel 0)
(channel 0)
24 23
24 23
TDLE
1
1
1
RDLE
1
1
16 15
16 15
TDRE
0
1
1
Control data
Rev. 1.00 Dec. 27, 2005 Page 619 of 932
(channel 1)
Section 17 Serial I/O with FIFO (SIOF)
8 7
8 7
Bit
Bit
RDRE
0
1
0
0
TLREP
x
0
1
REJ09B0269-0100