HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 558

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 15 Realtime Clock (RTC)
15.3.9
RSECAR is an alarm register corresponding to the second counter RSECCNT of the RTC. When
the ENB bit is set to 1, a comparison with the RSECCNT value is performed. From among
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR, the counter and alarm register
comparison is performed only on those with ENB bits and the YAEN bit in RCR3 set to 1, and if
each of those coincide, an RTC alarm interrupt is generated.
The range of second alarm which can be set is 0 to 59 (decimal). Errant operation will result if any
other value is set.
RSECAR is an 8-bit readable/writable register. The ENB bit in RSECAR is initialized to 0 by a
power-on reset. The remaining RSECAR fields are not initialized by a power-on reset or manual
reset, or in standby mode.
15.3.10 Minute Alarm Register (RMINAR)
RMINAR is an alarm register corresponding to the minute counter RMINCNT. When the ENB bit
is set to 1, a comparison with the RMINCNT value is performed. From among
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR, the counter and alarm register
comparison is performed only on those with ENB bits and the YAEN bit in RCR3 set to 1, and if
each of those coincide, an RTC alarm interrupt is generated.
The range of minute alarm which can be set is 0 to 59 (decimal). Errant operation will result if any
other value is set.
Rev. 1.00 Dec. 27, 2005 Page 514 of 932
REJ09B0269-0100
Bit
7
6 to 4
3 to 0
Second Alarm Register (RSECAR)
Bit Name
ENB


Initial Value
0


R/W
R/W
R/W
R/W
Description
Second Alarm Enable
Specifies whether comparison of RSECCNT and
0: Not compared
1: Compared
Setting value for 10-unit of second alarm in the
BCD-code.
The range can be set from 0 to 5 (decimal).
Setting value for 1-unit of second alarm in the
BCD-code.
The range can be set from 0 to 9 (decimal).
RSECAR is performed as an alarm condition.