HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 693
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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18.3.4
ECSIPR is a 32-bit readable/writable register that enables or disables the interrupt sources
indicated by ECSR. Each bit can disable or enable interrupts corresponding to the bits in ECSR.
Bit
0
Bit
31 to 3
2
1
0
Bit Name
LCHNGIP
MPDIP
ICDIP
Bit Name
ICD
EtherC Interrupt Permission Register (ECSIPR)
Initial
Value
0
Initial
Value
All 0
0
0
0
R/W
R/W
R/W
R
R/W
R/W
R/W
Description
Illegal Carrier Detection
Indicates that the PHY-LSI has detected an illegal
carrier on the line. If a change in the signal input from
the PHY-LSI occurs before the software recognition
period, the correct information may not be obtained.
Refer to the timing specification for the PHY-LSI used.
0: PHY-LSI has not detected an illegal carrier on the
1: PHY-LSI has detected an illegal carrier on the line
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
LINK Signal Changed Interrupt Enable
0: Interrupt notification by the LCHNG bit is disabled
1: Interrupt notification by the LCHNG bit is enabled
Magic Packet Detection Interrupt Enable
0: Interrupt notification by the MPD bit is disabled
1: Interrupt notification by the MPD bit is enabled
Illegal Carrier Detection Interrupt Enable
0: Interrupt notification by the ICD bit is disabled
1: Interrupt notification by the ICD bit is enabled
line
Rev. 1.00 Dec. 27, 2005 Page 649 of 932
Section 18 Ethernet Controller (EtherC)
REJ09B0269-0100
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