HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 639

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

17.3.4
SIRDAR is used to specify the position of the receive data in a frame. SIRDAR is initialized by a
power-on reset or software reset.
Bit
6
5
4
3
2
1
0
Bit
15
14 to 12
Serial Receive Data Assign Register (SIRDAR)
Bit Name
TLREP
—
—
TDRA3
TDRA2
TDRA1
TDRA0
Bit Name
RDLE
—
Initial
Value
0
0
0
0
0
0
0
Initial
Value
0
All 0
R/W
R/W
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R
Description
Transmit Left Channel Repeat
This bit setting is valid when the TDRE bit is set to 1.
When this bit is set to 1, settings of bits SITDR15 to
SITDR0 in SITDR are ignored.
0: Transmits data specified in the SITDR bit in SITDR as
1: Repeatedly transmits data specified in the SITDL bit in
Reserved
These bits are always read as 0. The write value should
always be 0.
Transmit Right Channel Data Assigns
Specify the position of right-channel data in transmit frame
as B′0000 to B′1110. Transmit data for the right channel is
specified in bits SITDR15 to SITDR0 in SITDR.
Note: If the TDRA3 to TDRA0 bits are set to B′1111,
Description
Receive Left Channel Data Enable
0: Disables left channel data reception
1: Enables left channel data reception
Reserved
These bits are always read as 0. The write value should
always be 0.
right channel data.
SITDR as right channel data
operation is not guaranteed.
Rev. 1.00 Dec. 27, 2005 Page 595 of 932
Section 17 Serial I/O with FIFO (SIOF)
REJ09B0269-0100