HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 672

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 17 Serial I/O with FIFO (SIOF)
Table 17.10 shows the details of initialization upon transmission or reception reset.
Table 17.10 Transmission and Reception Reset
Module Stop: In the module stop state, the SIOF stops transmit/receive operation with contents of
all registers retained. If transmit/receive operation is not performed immediately after the module
stop state is cleared, issue a transmit/receive reset.
17.4.8
The SIOF has four types of interrupts listed below. This classification is reflected to the IRR7
(SIOF0) and IRR8 (SIOF1) of the interrupt controller (INTC).
• Transmit interrupt (TXI)
• Receive interrupt (RXI)
• Control interrupt (CCI)
• Error interrupt (ERI)
Interrupt Sources: Interrupts can each be issued by several sources. Each source is shown as an
SIOF status in SISTR. Table 17.11 lists the SIOF interrupt sources.
Rev. 1.00 Dec. 27, 2005 Page 628 of 932
REJ09B0269-0100
Type
Transmission reset
Reception reset
Interrupts
Objects Initialized
SITDR
Transmit FIFO write pointer, transmit FIFO read pointer
TCRDY bit, TFEMP bit, TDREQ bit in SISTR
TXE bit in SICTR
SIRDR
Receive FIFO write pointer, receive FIFO read pointer
RCRDY bit, RFFUL bit, RDREQ bit in SISTR
RXE bit in SICTR