HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 652

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 17 Serial I/O with FIFO (SIOF)
Rev. 1.00 Dec. 27, 2005 Page 608 of 932
REJ09B0269-0100
Bit
8
7 to 5
4
3
2
1
0
Bit Name
RDREQE
—
FSERRE
TFOVRE
TFUDRE
RFUDRE
RFOVRE
Initial
Value
0
All 0
0
0
0
0
0
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
Description
Receive Data Transfer Request Enable
0: Disables interrupts due to receive data transfer requests
1: Enables interrupts due to receive data transfer requests
Reserved
These bits are always read as 0. The write value should
always be 0.
Frame Synchronization Error Enable
0: Disables interrupts due to frame synchronization error
1: Enables interrupts due to frame synchronization error
Transmit FIFO Overrun Enable
0: Disables interrupts due to transmit FIFO overrun
1: Enables interrupts due to transmit FIFO overrun (error
Transmit FIFO Underrun Enable
0: Disables interrupts due to transmit FIFO underrun
1: Enables interrupts due to transmit FIFO underrun (error
Receive FIFO Underrun Enable
0: Disables interrupts due to receive FIFO underrun
1: Enables interrupts due to receive FIFO underrun (error
Receive FIFO Overrun Enable
0: Disables interrupts due to receive FIFO overrun
1: Enables interrupts due to receive FIFO overrun (error
(receive interrupt)
(error interrupt)
interrupt)
interrupt)
interrupt)
interrupt)