HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 818

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 19 Ethernet Controller Direct Memory Access Controller (E-DMAC)
(1)
Receive FIFO overflow alert signal is asserted when the number of the receive data accumulated
in the receive FIFO is equal to or more than the threshold set in the overflow alert FIFO threshold
register (FCFTR) (1). After that, when the number of the accumulated receive data drops below
(threshold − 32) bytes, the signal is negated (2).
Here, threshold values are as follows: 2048 − 64, 1792 − 32,…. Therefore, the signal-negated
values are as follows: 2048 − 96, 1792 − 64,….
(a)
The receive FIFO in the E-DMAC can perform writing (reception) data from the Ethernet line and
reading data from the system simultaneously. Therefore during system operation, receive data of
FIFO is always increased or decreased. If the change is performed near the threshold, the receive
FIFO overflow alert signal may be seen as shown in figure 19.10. Minimum of receive data
changes depending on the number of FIFO read cycles and rate of Ethernet line (10 to 100 Mbs).
Rev. 1.00 Dec. 27, 2005 Page 774 of 932
REJ09B0269-0100
(threshold − 32) bytes
Operation of Receive FIFO Overflow Alert Signal
Receive FIFO Overflow Alert Signal Changing
Threshold
Transfer to memory by E-DMAC
Figure 19.9 Summary of Receive FIFO Overflow Alert Signal
empty
full
Receive
FIFO
Receive
data
Alert signal
(1)
(2)
t