HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 838

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 22 User Debugging Interface (H-UDI)
Table 22.2 H-UDI Commands
22.3.3
SDBSR is a shift register, located on the PAD, for controlling the input/output pins of this LSI.
The initial value is undefined. SDBSR cannot be accessed by the CPU.
Using the EXTEST, SAMPLE/PRELOAD, CLAMP, and HIGHZ commands, a boundary scan
test conforming to the JTAG standard can be carried out. Table 22.3 shows the correspondence
between this LSI’s pins and boundary scan register bits.
Rev. 1.00 Dec. 27, 2005 Page 794 of 932
REJ09B0269-0100
Bit
15 to 13
12
11 to 8
7 to 2
1
0
TI7
0
0
0
0
0
0
1
1
1
Other than the above
TI6
0
0
0
1
1
1
0
1
1
Boundary Scan Register (SDBSR)
Bit Name
TI7 to TI5
TI4
TI3 to TI0



TI5
0
1
1
0
1
1
1
1
1
Initial
Value
All 1
0
All 1
All 1
0
1
TI4
0
0
1
0
0
1
—
0
1
Bits 15 to 8
TI3
—
—
—
—
—
—
—
—
—
R/W
R
R
R
R
R
R
TI2
—
—
—
—
—
—
—
—
—
Description
Test Instruction 7 to 0
The H-UDI instruction is transferred to SDIR by a
serial input from TDI.
For commands, see Table 22.2.
Reserved
These bits are always read as 1.
Reserved
This bit is always read as 0.
Reserved
This bit is always read as 1.
TI1
—
—
—
—
—
—
—
—
—
TI0
—
—
—
—
—
—
—
—
—
JTAG EXTEST
JTAG CLAMP
JTAG HIGHZ
JTAG SAMPLE/PRELOAD
H-UDI reset negate
H-UDI reset assert
H-UDI interrupt
JTAG IDCODE (Initial value)
JTAG BYPASS
Reserved
Description