HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 702

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 18 Ethernet Controller (EtherC)
18.3.21 TSU Counter Reset Register (TSU_CTRST)
TSU_CTRST clears the transmit, receive, and transfer frame counters to 0.
18.3.22 Relay Enable Register (Port 0 to 1) (TSU_FWEN0)
TSU_FWEN0 enables or disables relay operations from the MAC-0 to MAC-1 (writing to the
relay FIFO).
Rev. 1.00 Dec. 27, 2005 Page 658 of 932
REJ09B0269-0100
Bit
31 to 9 
8
7 to 0
Bit
31
30 to 0 
Bit Name
CTRST
Bit Name
FWEN0
Initial
Value
All 0
0
All 0
Initial
Value
0
All 0
R/W
R
R/W
R
R/W
R/W
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
TSU Counter Reset
When 1 is written to this bit, the values of registers
TXNCR0/1, TXALCR0/1, RXNLCR0/1, RXALCR0/1,
FWNLCR0/1, and FWALCR0/1 are cleared to 0. Writing
0 does not affect this bit. These bits are always read as
0.
Reserved
These bits are always read as 0. The write value should
always be 0.
Description
Port 0 to 1 Relay Operation Enable
0: Port 0 to 1 relay is disabled
1: Port 0 to 1 relay is enabled
When the value of the FCM2 to FCM0 in the TSU FIFO
size select register TSU_FCM is set to H′4, setting this
bit to 1 is prohibited.
Reserved
These bits are always read as 0. The write value should
always be 0.

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