HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 507

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Channel 5:
• DMA source address register_5 (SAR_5)
• DMA destination address register_5 (DAR_5)
• DMA transfer count register_5 (DMATCR_5)
• DMA channel control register_5 (CHCR_5)
Common:
• DMA operation register (DMAOR)
• DMA extension resource selector 0 (DMARS0)
• DMA extension resource selector 1 (DMARS1)
• DMA extension resource selector 2 (DMARS2)
13.3.1
SAR is a 32-bit readable/writable register that specifies the source address of a DMA transfer.
During a DMA transfer, SAR indicates the next source address. When the data is transferred from
an external device with the DACK in single address mode, SAR is ignored.
To transfer data in 16 bits or in 32 bits, specify the address with 16-bit or 32-bit address boundary.
When transferring data in 16-byte units, a 16-byte boundary (address 16n) must be set for the
source address value.
SAR is undefined at reset and retains the current value in standby or module standby mode.
13.3.2
DAR is a 32-bit readable/writable register that specifies the destination address of a DMA transfer.
During a DMA transfer, DAR indicates the next destination address. When the data is transferred
to an external device with the DACK in single address mode, DAR is ignored.
To transfer data in 16 bits or in 32 bits, specify the address with 16-bit or 32-bit address boundary.
When transferring data in 16-byte units, a 16-byte boundary (address 16n) must be set for the
source address value.
DAR is undefined at reset and retains the current value in standby or module standby mode.
DMA Source Address Register (SAR)
DMA Destination Address Register (DAR)
Section 13 Direct Memory Access Controller (DMAC)
Rev. 1.00 Dec. 27, 2005 Page 463 of 932
REJ09B0269-0100