HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 713
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 713 of 980
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18.3.31 Relay Function Set Register (Common) (TSU_FWSLC)
When the CAM is used, the referred area in the CAM entry table (partially or wholly) can be
specified by the TSU_POST1 to TSU_POST4 registers. When the CAM is installed outside this
LSI, the evaluation results of the external CAM can be referred by input on the CAMSEN0 and
CAMSEN1 pins. (For details, refer to section 18.4.4, CAM Function.) TSU_FWSLC enables
settings by the TSU_POST1 to TSU_POST4 registers and conditions for referring signals on the
CAMSEN0 and CAMSEN1 pins. Writing to this register is prohibited, after relay operations have
been enabled once (after the FWEN0 in TSU_FWEN0 or the FWEN1 in TSU_FWEN1 is set to
1).
Bit
31 to 14
13
12
11 to 8
Bit Name
POSTENU
POSTENL
Initial
Value
All 0
0
0
All 0
R/W
R
R/W
R/W
R
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Enables the settings of the POST field of CAM entry
tables 0 to 15 (settings by the TSU_POST1 and
TSU_POST2 registers).
0: Disables the settings of the POST field. (The CAM
1: Enables the settings of the POST field. (The CAM
Enables the settings of the POST field of CAM entry
tables 16 to 31 (settings by the TSU_POST3 and
TSU_POST4 registers).
0: Disables the settings of the POST field. (The CAM
1: Enables the settings of the POST field. (The CAM
Reserved
These bits are always read as 0. The write value
should always be 0.
entry table is referred only in port 0 reception.)
entry table reference conditions follow the POST
field settings.)
entry table is referred only in port 1 reception.)
entry table reference conditions follow the POST
field settings.)
Rev. 1.00 Dec. 27, 2005 Page 669 of 932
Section 18 Ethernet Controller (EtherC)
REJ09B0269-0100
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