HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 136
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 3 DSP Operating Unit
Note: A branch instruction without delay (BT, BF, TRAPA) can be placed as a repeat end
3. Repeat counter and repeat control
Rev. 1.00 Dec. 27, 2005 Page 92 of 1044
REJ09B0269-0100
Repeat control instructions
Load instructions for SR, RS, and RE registers
The CPU always execute a program with comparing the repeat end register (RE) and the (PC –
4) (current instruction address). If the (PC – 4) [31:1] matches the RE [31:1] while bit 0 of RE
register is set to 1 and RC [11:0] of SR register is not 0, the extended repeat control function is
initiated.
If RC ≥ 2, a control is passed to a repeat start instruction after a repeat end instruction has
If RC == 1, the RC is decremented to 0 at the completion of the repeat end instruction and
If RC == 0, the repeat control function is not initiated even if a repeat detection instruction
BRA, BSR, BT/S, BF/S, BSRF, RTS, BRAF, RTE, JSR, JMP
SETRC, LDRS, LDRE, LDRC
LCD Rn,SR, LDC @Rn+,SR, LDC Rn,RE, LDC @Rn+,RE, LDC Rn,RS, LDC @Rn+,RS
been executed. The RC is decremented by 1 at the completion of the repeat end instruction.
a control is passed to the subsequent instruction.
is executed. The repeat loop is executed once as normal instructions and a control is not be
passed to a repeat start instruction even if a repeat end instruction is executed.
instruction. A delay stop of a delayed branch instruction can also be placed as a repeat end
instruction. In this case, the RC[11:0] value is decremented by 1 regardless of branch
occurrence. If no branch occurs, a control returns to a repeat start instruction. If a branch
occurs, a control is passed to a branch destination.
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