HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 835

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
This LSI incorporates a user debugging interface (H-UDI) and advanced user debugger (AUD) for
a boundary scan function and emulator support.
This section describes the H-UDI. The AUD is a function exclusively for use by an emulator.
Refer to the User’s Manual for the relevant emulator for details of the AUD.
22.1
The H-UDI (User debugging interface) is a serial I/O interface which conforms to JTAG (Joint
Test Action Group, IEEE Standard 1149.1 and IEEE Standard Test Access Port and Boundary-
Scan Architecture) specifications.
The H-UDI in this LSI supports a boundary scan mode, and is also used for emulator connection.
When using an emulator, H-UDI functions should not be used. Refer to the emulator manual for
the method of connecting the emulator.
Figure 22.1 shows a block diagram of the H-UDI.
Features
Section 22 User Debugging Interface (H-UDI)
TRST
TDO
TMS
TCK
TDI
Figure 22.1 Block Diagram of H-UDI
TAP controller
SDBPR
MUX
Section 22 User Debugging Interface (H-UDI)
Rev. 1.00 Dec. 27, 2005 Page 791 of 932
Decoder
SDID
SDIR
Local
bus
REJ09B0269-0100

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