DS3181 Maxim Integrated Products, DS3181 Datasheet - Page 155

• Manufacturer Part Number: DS3181
• Description: Network Controller & Processor ICs DS3-E3 ATM-Packet PH Y with Built-in Line
• Manufacturer: Maxim Integrated Products

Specifications of DS3181

• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 44.736 Mbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 280 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: TEBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS3181/DS3182/DS3183/DS3184
A Change Of Frame Alignment (COFA) is declared when the DS3 PLCP framer updates the data path frame
counters with a frame alignment that is different from the current data path frame alignment.
A Remote Alarm Indication (RAI) condition is declared when ten consecutive frames are received with the RAI bit
(fifth bit of G1) set to one. An RAI condition is terminated when ten consecutive frames are received with the RAI
bit set to zero.
Three types of errors are accumulated, framing errors, BIP-8 errors and Remote Error Indication (REI) errors.
Framing errors are determined by comparing A1, A2, and P# to their expected values. The type of framing errors
accumulated is programmable (OOF, bit, byte, or word). An OOF error increments the count whenever an OOF
condition is first detected (up to 1 per 3 sub-frames). A bit error increments the count once for each bit in A1, each
bit in A2, and each bit in P# that does not match its expected value (up to 24 per sub-frame). A byte error
increments the count once for each A1 byte, A2 byte, and P# byte that does not match its expected value (up to 3
per sub-frame). A word error increments the count once for each frame alignment word (A1, A2, and P#) that does
not match its expected value (up to 1 per sub-frame). The detection of POI byte (P#) framing errors is
programmable (on or off).
BIP-8 errors are determined by calculating the BIP-8 of the current frame (path overhead and cell bytes), and
comparing the calculated BIP-8 to the B1 byte in the next frame. The type of BIP-8 errors accumulated is
programmable (bit or block). A bit error increments the count once for each bit in the B1 byte that does not match
the corresponding bit in the calculated BIP-8 (up to 8 per frame). A block error increments the count if any bit in the
B1 byte does not match the corresponding bit in the calculated BIP-8 (up to 1 per frame).
REI errors are determined by the four REI bits (first four bits of G1). The REI error count is incremented by the
value of the four REI bits (up to 8 per frame). Values of 9h - Fh are treated as zero errors.
10.8.6.4 Receive DS3 PLCP Overhead Extraction
Overhead extraction extracts all of the DS3 PLCP path overhead bytes from the DS3 PLCP frame. All of the PLCP
path overhead (POH) bytes (Z6 – Z1, F1, B1, G1, M2, M1, and C1) are output on the receive overhead bus
(RPOHCLK, RPOH, and RPOHSOF). The B1 byte is output as an error indication (modulo 2 addition of the
calculated BIP-8 and the B1 byte). In addition, the Z6 – Z1, F1, G1 (6:8), M2, and M1 bytes are integrated and
stored in registers along with change indications. G1 (6:8) has an unstable indication as well. The F1 byte is sent to
the receive trail trace buffer, and can also be sent to the receive HDLC controller. The M2 byte and/or M1 byte can
be sent to the receive HDLC controller. The source of the data transferred to the receive HDLC controller is
programmable (F1, M2, M1, or M2 & M1). If both the M2 and M1 byte are programmed to be the source for the
receive HDLC controller, they are concatenated as a single data link as opposed to two separate data links.
Once all frame processing has been completed, the ATM cells are passed on to the ATM/Packet Processor with a
start of cell indication.
10.8.7 Transmit E3 PLCP Frame Processor
The E3 PLCP frame format is shown in
Figure
10-34. A1 and A2 are the sub-frame Alignment bytes that have a
value of F6h and 28h, respectively. P8–P0 are the Path Overhead Identifier (POI) bytes that indicate the path
overhead byte contained in the current sub-frame. Z3–Z1 are growth bytes reserved for future use. F1 is the Path
User Channel byte allocated for user communications purposes (This byte is undefined in ATM). B1 is the Bit
Interleaved Parity-8 (BIP-8) byte used for PLCP path error monitoring. G1 is the PLCP Path Status Byte (See
Figure
10-35) used for far-end path status and performance monitoring (bits 6–8 are undefined in ATM). M2 and
M1 are the DQDB Layer Management Information bytes used for DQDB layer management communications
(These bytes are undefined in ATM). C1 is the Cycle/Stuff Counter byte used as for stuff indication.
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