DS3181 Maxim Integrated Products, DS3181 Datasheet - Page 163

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DS3181

Manufacturer Part Number
DS3181
Description
Network Controller & Processor ICs DS3-E3 ATM-Packet PH Y with Built-in Line
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3181

Product
Framer
Number Of Transceivers
1
Data Rate
44.736 Mbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
280 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Package / Case
TEBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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10.10 DS3/E3 Framer/Formatter
10.10.1 General Description
The Receive DS3/E3 Framer receives a unipolar DS3/E3 signal, determines frame alignment and extracts the
DS3/E3 overhead in the receive direction. The Transmit DS3/E3 Formatter receives a DS3/E3 payload, generates
framing, inserts DS3/E3 overhead, and outputs a unipolar DS3/E3 signal in the transmit direction.
The Receive DS3/E3 Framer receives a DS3/E3 signal, determines the frame alignment, extracts the DS3/E3
overhead, and outputs the payload with frame and overhead
The Transmit DS3/E3 Formatter receives a DS3/E3 payload from the ATM/Packet Processor, generates a DS3/E3
frame, optionally inserts DS3/E3 overhead, and transmits the DS3/E3 signal.
See
Figure 10-39. Framer Detailed Block Diagram
10.10.2 Features
10.10.2.1 Transmit Formatter
10.10.2.2 Receive Framer
Clock Rate
Programmable DS3 or E3 formatter – Accepts a DS3 (M23 or C-bit) or E3 (G.751 or G.832) signal and
performs DS3/E3 overhead generation.
Arbitrary framing format support – Generates a signal with an arbitrary framing format. The line
overhead/stuff periods are added into the data stream using an overhead mask signal.
Generates alarms and errors – DS3 alarm conditions (AIS, RDI, and Idle) and errors (framing, parity, and
FEBE), or E3 alarm conditions (AIS and RDI/RAI) and errors (framing, parity, and REI) can be inserted into the
outgoing data stream.
Externally controlled serial DS3/E3 overhead insertion port – Can insert all DS3 or E3 overhead via a
serial interface. DS3/E3 overhead insertion is fully controlled via the serial overhead interface.
HDLC overhead insertion – An HDLC channel can be inserted into the DS3 or E3 data stream.
FEAC insertion – A FEAC channel can be inserted into the DS3 or E3 data stream.
Trail Trace insertion – Inputs and inserts the G.832 E3 TR byte.
Programmable DS3 or E3 framer – Accepts a DS3 (M23 or C-bit) or E3 (G.751 or G.832) signal and performs
DS3/E3 overhead termination.
Receive
Transmit
DS3/E3
Figure 10-39
DS3/E3
Adapter
LIU
LIU
for the location of the DS3/E3 Framer/Formatter blocks in the DS318x devices.
Decoder
Encoder
B3ZS/
B3ZS/
HDB3
HDB3
TUA1
TAIS
IEEE P1149.1
Access Port
JTAG Test
FEAC
DS3 / E3
Receive
Framer
Formatter
DS3 / E3
Transmit
Buf f er
Trace
Trail
HDLC
UA1
GEN
163
TX FRAC/
PLCP
RX FRAC/
PLCP
Processor
Processor
Rx Packet
Processor
Processor
Tx Packet
RX BERT
TX BERT
Rx Cell
Tx Cell
Microprocessor
Interface
FIFO
FIFO
Tx
Rx

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