DS3181 Maxim Integrated Products, DS3181 Datasheet - Page 296

• Manufacturer Part Number: DS3181
• Description: Network Controller & Processor ICs DS3-E3 ATM-Packet PH Y with Built-in Line
• Manufacturer: Maxim Integrated Products

Specifications of DS3181

• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 44.736 Mbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 280 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: TEBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 8: Framing Error Interrupt Enable (FEIE) – This bit enables an interrupt if the FEL bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 0: Framing Error Count Interrupt Enable (FECIE) – This bit enables an interrupt if the FECL bit is set and the
bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Framing Error Count (FE[15:0]) – These 16 bits indicate the number of framing error events on the
incoming E3 data stream. This register is updated via the PMU signal (see Section 10.4.5).
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
FE15
FE7
15
15
—
—
0
7
0
0
7
0
FE14
FE6
14
14
—
—
0
6
0
0
6
0
E3G751.RSRIE2
E3 G.751 Receive Status Register Interrupt Enable 2
(1,3,5,7)2Eh
E3G751.RFECR
E3 G.751 Receive Framing Error Count Register
(1,3,5,7)34h
FE13
FE5
13
13
—
—
0
5
0
0
5
0
FE12
FE4
12
12
—
—
0
0
0
0
4
4
296
Reserved
Reserved
FE11
FE3
11
11
0
3
0
0
3
0
Reserved
Reserved
FE10
FE2
10
10
0
2
0
0
2
0
Reserved
Reserved
FE9
FE1
9
0
1
0
9
0
1
0
FECIE
FEIE
FE8
FE0
8
0
0
0
8
0
0
0