DS3181 Maxim Integrated Products, DS3181 Datasheet - Page 58

• Manufacturer Part Number: DS3181
• Description: Network Controller & Processor ICs DS3-E3 ATM-Packet PH Y with Built-in Line
• Manufacturer: Maxim Integrated Products

Specifications of DS3181

• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 44.736 Mbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 280 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: TEBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TDXA[4:2]
TDXA[1] /
TPRTY
TSOX
TPXA
TSPA
TEN
PIN
TYPE
Oz
Oz
O
I
I
I
In 8-bit mode, TDATA[7] is the MSB, TDATA[0] is the LSB, and TDATA[31:8] are not
used and ignored.
Transmit Parity
TPRTY: This signal indicates the parity on the data bus when parity checking is
enabled. This option is programmable. TPRTY is ignored if parity checking is
disabled. This signal is sampled on the rising edge of TSCLK.
Transmit Enable (active low)
TEN: This signal is used by the ATM/Link device to control the transfer of cell/packet
data on the TDATA bus. If TEN is high, no transfer occurs. If TEN is low, a transfer
occurs. This signal can be sampled on the rising edge of TSCLK.
Transmit Direct Cell/Packet Available [1] / Polled Cell/Packet Available (tri-state)
This signal is tri-state when global reset is applied.
TDXA[1]: When direct status mode is selected, this signal is used to indicate when
port 1 can accept data from the ATM/Link layer device. This signal is updated on the
rising edge of TSCLK.
In UTOPIA L2 or UTOPIA L3 modes, TDXA goes high when port 1 can accept the
transfer of more than a programmable number of ATM cells. TDXA goes low when
port 1 cannot accept the transfer of a complete ATM cell.
In POS-PHY L2 or POS-PHY L3 modes, TDXA goes high when port 1 can store more
data than the "almost full" level. TDXA goes low when port 1 is full.
TPXA: (reset default) When polled status mode is selected, this signal is used to
indicate when the polled port, as selected by TADR[4:0], can accept data from the
ATM/Link layer device. This signal is updated on the rising edge of TSCLK.
In UTOPIA L2 or UTOPIA L3 modes, TPXA goes high when the polled port’s FIFO
can accept the transfer of more than a programmable number of ATM cells (the
“almost full” level). TPXA goes low when the polled port cannot accept the transfer of
a complete ATM cell.
In POS-PHY L2 or POS-PHY L3 modes, TPXA goes high when the polled port’s FIFO
can store more data than the "almost full" level. TPXA goes low when the polled port
is full.
In UTOPIA L2 (reset default) or POS-PHY L2 modes, this signal is driven when one
of the ports is being polled, and is tri-stated when none of the ports is being polled or
when data path reset is active.
In UTOPIA L3 or POS-PHY L3 modes, this signal is driven.
Note: Polled status mode or direct status mode is selected by the GL.CR1.DIREN bit.
Transmit Direct Cell/Packet Available [4:2]
TDXA[4:2]: This signal is used to indicate when the associated port can accept data
from the ATM/Link layer device. This signal can be updated on the rising edge of
TSCLK.
In UTOPIA L2 or L3 modes, TDXA goes high when the associated port’s can accept
the transfer of more than a programmable number of ATM cells (“almost full” level).
TDXA goes low when the associated port cannot accept the transfer of a complete
ATM cell.
In POS-PHY L2 or L3 modes, TDXA goes high when the associated port’s FIFO can
store more data than the "almost full" level. TDXA goes low when the associated
port’s FIFO is full.
Transmit Start Of Cell/Packet
TSOX: This signal is used to indicate the first transfer of a cell/packet. This signal
can be sampled on the rising edge of TSCLK.
In UTOPIA L2 or L3 modes, TSOX indicates the first transfer of a cell.
In POS-PHY L2 or L3 modes, TSOX indicates the first transfer of a packet.
Transmit Selected Packet Available
This signal is tri-state when global reset is applied.
TSPA: In POS-PHY L2 or POS-PHY L3 modes, this signal is used to indicate the
selected port can accept data from the Link layer device. TSPA goes high when a
port is selected for transfer and it can accept more data than the "almost full" level.
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