DS3181 Maxim Integrated Products, DS3181 Datasheet - Page 23

• Manufacturer Part Number: DS3181
• Description: Network Controller & Processor ICs DS3-E3 ATM-Packet PH Y with Built-in Line
• Manufacturer: Maxim Integrated Products

Specifications of DS3181

• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 44.736 Mbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 280 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: TEBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4
Table 4-1. Standards Compliance
ANSI
ATM FORUM
ETSI
IETF
ISO
ITU-T
SPECIFICATION
ETS EN 300 689
af-phy-0034.000
af-phy-0039.000
af-phy-0043.000
af-phy-0054.000
af-phy-0136.000
af-phy-0143.000
af-bici-0013.003
ISO 3309:1993
ETS 300 686
ETS 300 337
ETS 300 689
T1.102-1993
T1.107-1995
T1.231-1997
T1.404-1994
T1.646-1995
STANDARDS COMPLIANCE
RFC 1661
RFC 1662
RFC 2496
G.703
G.704
G.751
G.775
G.804
G.823
G.824
Digital Hierarchy – Electrical Interfaces
Digital Hierarchy – Formats Specification
Digital Hierarchy – Layer 1 In-Service Digital Transmission Performance Monitoring
Network-to-Customer Installation – DS3 Metallic Interface Specification
Broadband ISDN – Physical Layer Specification for User-Network Interfaces Including
DS1/ATM
E3 Public UNI, August, 1995
UTOPIA Level 2, Version 1.0, June, 1995
A Cell-Based Transmission Convergence Sublayer for Clear-Channel Interfaces,
November, 1995
DS3 Physical Layer Interface Specification, January, 1996
UTOPIA L3 Physical Layer Interface, November, 1999
Frame-based ATM Interface (Level 3), March, 2000
BISDN Inter Carrier Interface (B-ICI) Specification Version 2.0 (Integrated), December, 1995
Business TeleCommunications; 34Mbps and 140Mbits/s digital leased lines (D34U, D34S,
D140U and D140S); Network interface presentation, 1996
Transmission and Multiplexing (TM); Generic frame structures for the transport of various
signals (including Asynchronous Transfer Mode (ATM) cells and Synchronous Digital
Hierarchy (SDH) elements) at the ITU-T Recommendation G.702 hierarchical rates of 2 048
kbit/s, 34 368 kbit/s and 139 264 kbit/s, Second Edition, June, 1997
Access and Terminals (AT); 34Mbps Digital Leased Lines (D34U and D34S); Terminal
equipment interface, July 2001
Business TeleCommunications (BTC); 34 Mbps digital leased lines (D34U and D34S),
Terminal equipment interface, V 1.2.1, 2001-07
The Point-to-Point Protocol (PPP), July, 1994
PPP in HDLC-like Framing, July, 1994
Definition of Managed Objects for the DS3/E3 Interface Type, January, 1999
Information Technology – Telecommunications & information exchange between systems –
High Level Data Link Control (HDLC) procedures – Frame structure, Fifth Edition, 1993
Physical/Electrical Characteristics of Hierarchical Digital Interfaces, 1991
Synchronous Frame Structures Used at 1544, 6312, 2048, 8488 and 44 736 kbit/s
Hierarchical Levels, July, 1995
Digital Multiplex Equipment Operating at the Third Order Bit Rate of 34,368 kbit/s and the
Fourth Order bit Rate of 139,264 kbit/s and Using Positive Justification, 1993
Loss Of Signal (LOS) and Alarm Indication Signal (AIS) Defect Detection and Clearance
Criteria, November, 1994
ATM Cell Mapping Into Plesiochronous Digital Hierarchy (PDH), November, 1993
The Control of Jitter and Wander Within Digital Networks Which are Based on the 2048
kbit/s Hierarchy, 1993
The Control of Jitter and Wander within Digital Networks that are Based on the 1544kbps
23
SPECIFICATION TITLE