DS3181 Maxim Integrated Products, DS3181 Datasheet - Page 398

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DS3181

Manufacturer Part Number
DS3181
Description
Network Controller & Processor ICs DS3-E3 ATM-Packet PH Y with Built-in Line
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3181

Product
Framer
Number Of Transceivers
1
Data Rate
44.736 Mbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
280 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Package / Case
TEBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS3181+
Manufacturer:
Maxim Integrated
Quantity:
10 000
Part Number:
DS3181N+
Manufacturer:
Maxim Integrated
Quantity:
10 000
Table 18-14. Receiver Input Characteristics—E3 Mode
Table 18-15. Transmitter Output Characteristics—DS3 and STS-1 Modes
(V
Table 18-16. Transmitter Output Characteristics—E3 Mode
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
(V
(V
Receive Sensitivity (Length of Cable)
Signal-to-Noise Ratio, Interfering Signal Test (Notes 1, 2)
Input Pulse Amplitude, RMON = 0 (Notes 2, 3)
Input Pulse Amplitude, RMON = 1 (Notes 2, 3)
Analog LOS Declare, RMON = 0 (Note 4)
Analog LOS Clear, RMON = 0 (Note 4)
Analog LOS Declare, RMON = 1 (Note 4)
Analog LOS Clear, RMON = 1 (Note 4)
Intrinsic Jitter Generation (Note 2)
DS3 Output Pulse Amplitude, TLBO = 0 (Note 5)
DS3 Output Pulse Amplitude, TLBO = 1 (Note 5)
CC52 Output Pulse Amplitude, TLBO = 0 (Note 5)
CC52 Output Pulse Amplitude, TLBO = 1 (Note 5)
Ratio of Positive and Negative Pulse-Peak Amplitudes
DS3 Unframed All-Ones Power Level at 22.368MHz,
3kHz Bandwidth
DS3 Unframed All-Ones Power Level at 44.736MHz vs.
Power Level at 22.368MHz, 3kHz Bandwidth
Intrinsic Jitter Generation (Note 5)
Output Pulse Amplitude (Note 5)
Pulse Width
Ratio of Positive and Negative Pulse Amplitudes
(at Centers of Pulses)
Ratio of Positive and Negative Pulse Widths
(at Nominal Half Amplitude)
Intrinsic Jitter Generation (Note 6)
DD
DD
DD
= 3.3V ±5%, T
= 3.3V ±5%, T
= 3.3V ±5%, T
An interfering signal (2
rate) is added to the wanted signal. The combined signal is passed through 0 to 900ft of coaxial cable and presented to the LIU.
This spec indicates the lowest signal-to-noise ratio that results in a bit error ratio <10
Not tested during production test.
Measured on the line side (i.e., the BNC connector side) of the 1:2 receive transformer
data traffic is unframed 2
With respect to nominal 800mVpk signal for DS3/STS-1 and nominal 1000mVpk signal for E3.
Measured on the line side (i.e., the BNC connector side) of the 2:1 transmit transformer
Measured with jitter-free clock applied to TCLK and a bandpass jitter filter with 10Hz and 800kHz cutoff frequencies. Not tested
during production test.
A
A
A
= -40°C to +85°C.)
= -40°C to +85°C.)
= -40°C to +85°C.)
PARAMETER
PARAMETER
PARAMETER
15
– 1 PRBS for DS3/STS-1, 2
15
– 1 PRBS for DS3/STS-1 and unframed 2
23
– 1 PRBS for E3, B3ZS/HDB3 encoded, compliant waveshape, nominal bit
398
23
– 1 PRBS for E3.
0.95
0.95
MIN
MIN
-1.8
700
520
700
520
900
0.9
MIN
900
-16
-29
-9
.
(Figure
14.55
1000
TYP
0.02
TYP
0.02
(Figure
800
700
800
700
1200
TYP
0.03
-24
-17
12
1-1). During measurement, incoming
1-1).
MAX
1100
MAX
1100
+5.7
0.05
1.05
1.05
0.05
1300
900
800
850
MAX
1.1
-20
260
-28
-38
UNITS
UNITS
mVpk
mVpk
mVpk
mVpk
mVpk
UNITS
dBm
UI
UI
mVpk
mVpk
UI
dB
ns
dB
dB
dB
dB
P-P
P-P
ft
P-P

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