DS3181 Maxim Integrated Products, DS3181 Datasheet - Page 5

• Manufacturer Part Number: DS3181
• Description: Network Controller & Processor ICs DS3-E3 ATM-Packet PH Y with Built-in Line
• Manufacturer: Maxim Integrated Products

Specifications of DS3181

• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 44.736 Mbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 280 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: TEBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.7 ATM C
10.8 DS3/E3 PLCP F
10.9 F
10.10 DS3/E3 F
10.11 HDLC O
10.12 T
10.13 FEAC C
10.14 L
10.7.1 General Description ........................................................................................................................... 139
10.7.2 Features ............................................................................................................................................. 139
10.7.3 Transmit Cell/Packet Processor......................................................................................................... 140
10.7.4 Receive Cell/Packet Processor.......................................................................................................... 141
10.7.5 Cell Processor.................................................................................................................................... 141
10.7.6 Packet Processor ............................................................................................................................... 146
10.7.7 FIFO ................................................................................................................................................... 148
10.7.8 System Loopback............................................................................................................................... 149
10.8.1 General Description ........................................................................................................................... 150
10.8.2 Features ............................................................................................................................................. 150
10.8.3 Transmit PLCP Frame Processor ...................................................................................................... 151
10.8.4 Receive PLCP Frame Processor ....................................................................................................... 151
10.8.5 Transmit DS3 PLCP Frame Processor .............................................................................................. 151
10.8.6 Receive DS3 PLCP Frame Processor ............................................................................................... 154
10.8.7 Transmit E3 PLCP Frame Processor................................................................................................. 155
10.8.8 Receive E3 PLCP Frame Processor.................................................................................................. 158
10.9.1 General Description ........................................................................................................................... 160
10.9.2 Features ............................................................................................................................................. 160
10.9.3 Transmit Fractional Interface ............................................................................................................. 161
10.9.4 Transmit Fractional Controller............................................................................................................ 161
10.9.5 Receive Fractional Interface .............................................................................................................. 161
10.9.6 Receive Fractional Controller............................................................................................................. 161
10.10.1 General Description ........................................................................................................................... 163
10.10.2 Features ............................................................................................................................................. 163
10.10.3 Transmit Formatter............................................................................................................................. 164
10.10.4 Receive Framer.................................................................................................................................. 164
10.10.5 C-bit DS3 Framer/Formatter .............................................................................................................. 168
10.10.6 M23 DS3 Framer/Formatter ............................................................................................................... 171
10.10.7 G.751 E3 Framer/Formatter............................................................................................................... 174
10.10.8 G.832 E3 Framer/Formatter............................................................................................................... 176
10.10.9 Clear-Channel Frame Processor ....................................................................................................... 181
10.11.1 General Description ........................................................................................................................... 181
10.11.2 Features ............................................................................................................................................. 182
10.11.3 Transmit FIFO .................................................................................................................................... 182
10.11.4 Transmit HDLC Overhead Processor ................................................................................................ 182
10.11.5 Receive HDLC Overhead Processor ................................................................................................. 183
10.11.6 Receive FIFO ..................................................................................................................................... 184
10.12.1 General Description ........................................................................................................................... 184
10.12.2 Features ............................................................................................................................................. 185
10.12.3 Functional Description........................................................................................................................ 185
10.12.4 Transmit Data Storage ....................................................................................................................... 186
10.12.5 Transmit Trace ID Processor ............................................................................................................. 186
10.12.6 Transmit Trail Trace Processing ........................................................................................................ 186
10.12.7 Receive Trace ID Processor .............................................................................................................. 186
10.12.8 Receive Trail Trace Processing ......................................................................................................... 186
10.12.9 Receive Data Storage ........................................................................................................................ 187
10.13.1 General Description ........................................................................................................................... 188
10.13.2 Features ............................................................................................................................................. 188
10.13.3 Functional Description........................................................................................................................ 188
10.14.1 General Description ........................................................................................................................... 190
INE
RACTIONAL
RAIL
E
T
NCODER
ELL
RACE
ONTROLLER
VERHEAD
RAMER
/HDLC P
P
C
AYLOAD
/D
ONTROLLER
RAMER
/F
ECODER
C
ORMATTER
ACKET
ONTROLLER
...................................................................................................................188
C
..............................................................................................................150
ONTROLLER
...........................................................................................................190
P
.........................................................................................................184
ROCESSING
....................................................................................................163
.................................................................................................181
...........................................................................................160
.....................................................................................139
5