DS3181 Maxim Integrated Products, DS3181 Datasheet - Page 289

• Manufacturer Part Number: DS3181
• Description: Network Controller & Processor ICs DS3-E3 ATM-Packet PH Y with Built-in Line
• Manufacturer: Maxim Integrated Products

Specifications of DS3181

• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 44.736 Mbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 280 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: TEBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.10.3 Transmit G.751 E3
The transmit G.751 E3 uses two registers.
12.10.3.1 Register Map
Table 12-35. Transmit G.751 E3 Framer Register Map
12.10.3.2 Register Bit Descriptions
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 9 to 8: Transmit N Bit Control (TNBC[1:0]) – These two bits control the source of the N bit.
Note: If TNBC[1:0] is 10 and TABC[1:0] is 01, both the N bit and A bit will carry the same transmit FEAC controller
(one bit per frame period), however, the N bit and A bit in the same frame may or may not be equal.
Bits 3 to 2: Transmit A Bit Control (TABC[1:0]) – These two bits control the source of the A bit.
Note: If TABC[1:0] is 01 and TNBC[1:0] is 10, both the A bit and N bit will carry the same transmit FEAC controller
(one bit per frame period), however, the A bit and N bit in the same frame may or may not be equal.
Bit 1: Transmit Frame Generation Control (TFGC) – When this bit is zero, the Transmit Frame Processor frame
generation is enabled. The E3 overhead positions in the incoming E3 payload will be overwritten with the internally
generated E3 overhead. When this bit is one, the Transmit Frame Processor frame generation is disabled. The E3
overhead positions in the incoming E3 payload will be passed through to error insertion. Note: The E3 overhead
periods can still be overwritten by overhead insertion.
Bit 0: Transmit Alarm Indication Signal (TAIS) – When 0, the normal signal is transmitted. When 1, the output
E3 data stream is forced to all ones (AIS).
(1,3,5,7)1Ch
(1,3,5,7)1Ah
(1,3,5,7)1Eh
(1,3,5,7)18h
ADDRESS
00 = 1
01 = transmit data from HDLC controller.
10 = transmit data from FEAC controller.
11 = 0
00 = automatically generated based upon received E3 alarms.
01 = transmit from the FEAC controller.
10 = 0
11 = 1
Reserved
15
—
0
7
0
E3G751.TEIR
E3G751.TCR
REGISTER
—
—
14
—
—
0
6
0
E3G751.TCR
E3 G.751 Transmit Control Register
(1,3,5,7)18h
E3 G.751 Transmit Control Register
E3 G.751 Transmit Error Insertion Register
Reserved
Reserved
Reserved
13
—
0
5
0
REGISTER DESCRIPTION
Reserved
Reserved
12
0
0
4
289
Reserved
TABC1
11
0
3
0
Reserved
TABC0
10
0
2
0
TNBC1
TFGC
9
0
1
0
TNBC0
TAIS
8
0
0
0