DS3181 Maxim Integrated Products, DS3181 Datasheet - Page 334

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DS3181

Manufacturer Part Number
DS3181
Description
Network Controller & Processor ICs DS3-E3 ATM-Packet PH Y with Built-in Line
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3181

Product
Framer
Number Of Transceivers
1
Data Rate
44.736 Mbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
280 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Package / Case
TEBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
DS3181+
Manufacturer:
Maxim Integrated
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Part Number:
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Manufacturer:
Maxim Integrated
Quantity:
10 000
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 4: Transmit FIFO Aborted Transfer Interrupt Enable (TFATIE) – This bit enables an interrupt if the TFATL bit
in the FF.TSRL register is set and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 3: Transmit FIFO Short Transfer Interrupt Enable (TFSTIE) – This bit enables an interrupt if the TFSTL bit in
the FF.TSRL register is set and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 2: Transmit FIFO Invalid Transfer Interrupt Enable (TFITIE) – This bit enables an interrupt if the TFITL bit in
the FF.TSRL register is set and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 1: Transmit FIFO Underflow Interrupt Enable (TFUIE) – This bit enables an interrupt if the TFUL bit in the
FF.TSRL register is set and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 0: Transmit FIFO Overflow Interrupt Enable (TFOIE) – This bit enables an interrupt if the TFOL bit in the
FF.TSRL register is set and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
15
0
7
0
14
0
6
0
FF.TSRIE
FIFO Transmit Status Register Interrupt Enable Register
(1,3,5,7)8Ah
13
0
5
0
TFATIE
12
0
0
4
334
TFSTIE
11
0
3
0
TFITIE
10
0
2
0
TFUIE
9
0
1
0
TFOIE
8
0
0
0

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