UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 1029

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2) Serial interface: Serial array unit (3/17)
Notes 1. When DAP0n = 0 and CKP0n = 0, or DAP0n = 1 and CKP0n = 1. The SIp setup time becomes “to SCKp↓”
Caution Select the normal input buffer for SIp and SCKp and the normal output mode for SOp by using the
Remarks 1.
SCKp cycle time
SCKp high-/low-level width
SIp setup time
(to SCKp↑)
SIp hold time
(from SCKp↑)
Delay time from SCKp↓ to
SOp output
Caution The pins mounted depend on the product. Refer to Caution 2 at the beginning of this chapter.
(T
(c) During communication at same potential (CSI mode) (slave mode, SCKp... external clock input)
A
2. When DAP0n = 0 and CKP0n = 0, or DAP0n = 1 and CKP0n = 1. The SIp hold time becomes “from
3. When DAP0n = 0 and CKP0n = 0, or DAP0n = 1 and CKP0n = 1. The delay time to SOp output becomes
4. C is the load capacitance of the SCKp and SOp output lines.
= −40 to +85°C, 2.7 V ≤ V
Parameter
2.
when DAP0n = 0 and CKP0n = 1, or DAP0n = 1 and CKP0n = 0.
PIMg and POMg registers.
SCKp↓” when DAP0n = 0 and CKP0n = 1, or DAP0n = 1 and CKP0n = 0.
“from SCKp↑” when DAP0n = 0 and CKP0n = 1, or DAP0n = 1 and CKP0n = 0.
Note 1
Note 3
Note 2
p: CSI number (p = 00, 01, 10),
g: PIM and POM number (g = 3, 7)
f
(Operation clock to be set by the CKS0n bit of the SMR0n register. n: Channel number (n = 0 to 2))
MCK
: Serial array unit operation clock frequency
t
t
t
t
t
t
KCY2
KH2
KL2
SIK2
KSI2
KSO2
Symbol
,
DD
CHAPTER 28 ELECTRICAL SPECIFICATIONS
= EV
4.0 V ≤ V
2.7 V ≤ V
C = 30 pF
DD
≤ 5.5 V, V
User’s Manual U19678EJ1V1UD
DD
DD
Note 4
≤ 5.5 V
≤ 4.0 V
Conditions
SS
4.0 V ≤ V
2.7 V ≤ V
= EV
16 MHz < f
f
MCK
SS
DD
DD
≤ 16 MHz
= AV
≤ 5.5 V
< 4.0 V
MCK
SS
= 0 V)
1/f
f
6/f
8/f
6/f
MIN.
KCY2
MCK
80
MCK
MCK
MCK
+50
/2
TYP.
2/f
2/f
MAX.
MCK
MCK
+45
+57
Unit
ns
ns
ns
ns
ns
ns
ns
ns
1027