UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 858

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

point, the last data of CSI is being transmitted. To start DMA transfer again, therefore, wait until transfer of CSI is
completed.
856
The fist trigger for consecutive transmission is not started by the interrupt of CSI. Start it by a software trigger.
CSI transmission of the second time and onward is automatically executed.
The DMA interrupt (INTDMA0) is generated as soon as the last data has been written to the transmit buffer. At this
Note The DST0 flag is automatically cleared to 0 when a DMA transfer is completed.
Writing the DEN0 flag is enabled only when DST0 = 0. To terminate a DMA transfer without waiting for
occurrence of the interrupt of DMA0 (INTDMA0), set DST0 to 0 and then DEN0 to 0 (for details, refer to
16.5.5 Forced termination by software).
Figure 16-7. Example of Setting for CSI Consecutive Transmission
Setting for CSI transfer
DRA0 = FB00H
DBC0 = 0100H
DMC0 = 48H
User program
DSA0 = 44H
processing
DEN0 = 1
STG0 = 1
DST0 = 1
Occurrence of
INTDMA0
Start
CHAPTER 16 DMA CONTROLLER
User’s Manual U19678EJ1V1UD
DST0 = 0
DEN0 = 0
DMA is started.
INTCSI10 occurs.
RETI
End
Note
DMA0 transfer
transmission
CSI
Hardware operation