UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 22

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UPD78F1233GB-GAH-AX

Manufacturer Part Number
UPD78F1233GB-GAH-AX
Description
MCU 16BIT 78K0R/LX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1233GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1233GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
1.1 Features
20
Remark The functions mounted depend on the product. See 1.6 Block Diagram and 1.7 Outline of Functions.
Note
• 40 MHz internal high-speed oscillation clock: 40 MHz (TYP.) (TIMER ARRAY UNIT)
• 8 MHz internal high-speed oscillation clock: 8 MHz (TYP.)
• 16-bit timer
• Watchdog timer
• Real-time counter
• On-chip motor control option unit
• CSI
• UART/UART (LIN-bus supported)
• Simplified I
• I
Minimum instruction execution time can be changed from high speed (0.05
speed system clock) to ultra low-speed (61
General-purpose register: 8 bits × 32 registers (8 bits × 8 registers × 4 banks)
ROM, RAM capacities
On-chip internal high-speed oscillation clocks
On-chip single-power-supply flash memory (with prohibition of chip erase/block erase/writing function)
Self-programming (with boot swap function/flash shield window function)
On-chip debug function
On-chip power-on-clear (POC) circuit and low-voltage detector (LVI)
On-chip watchdog timer (operable with the dedicated internal low-speed oscillation clock)
On-chip multiplier/divider (16 bits × 16 bits, 32 bits ÷ 32 bits)
On-chip clock output/buzzer output controller
On-chip BCD adjustment
I/O ports: 23 to 55 (N-ch open drain: 2)
Timer
On-chip comparator/programmable gain amplifier function
Serial interface
10-bit resolution A/D converter (AV
Power supply voltage: V
Operating ambient temperature: T
Flash ROM
2
64 KB
48 KB
32 KB
16 KB
C
This is 2 KB when the self-programming function is used.
2
C
3 KB
1.5 KB
RAM
2 KB
1 KB
Note
DD
μ
μ
78K0R/IB3
= 2.7 to 5.5 V
PD78F1203
PD78F1201
30-pin
A
REF
= −40 to +85°C
= 2.7 to 5.5 V): 6 to 12 channels
User’s Manual U19678EJ1V1UD
μ
μ
CHAPTER 1 OUTLINE
PD78F1213
PD78F1211
38-pin
μ
s: @ 32.768 kHz operation with subsystem clock)
: 20 MHz (TYP.) (Peripheral functions other than CPU and TIMER
ARRAY UNIT)
μ
μ
78K0R/IC3
PD78F1213
PD78F1211
44-pin
μ
μ
μ
PD78F1215
PD78F1214
PD78F1213
48-pin
μ
s: @ 20 MHz operation with high-
μ
μ
μ
78K0R/ID3
PD78F1225
PD78F1224
PD78F1223
52-pin
μ
μ
μ
78K0R/IE3
PD78F1235
PD78F1234
PD78F1233
64-pin

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