UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 250

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.5 Clock Generator Operation
mode (see Figure 5-1 and Figure 5-2).
78K0R/Ix3, thus enabling the following.
(1) Enhancement of safety function
(2) Improvement of performance
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The clock generator generates the following clocks and controls the operation modes of the CPU, such as standby
• Main system clock f
• Subsystem clock f
• Internal low-speed oscillation clock f
• CPU/peripheral hardware clock f
The CPU starts operation when the internal high-speed oscillator starts outputting after a reset release in the
When the X1 clock is set as the CPU clock by the default setting, the device cannot operate if the X1 clock is
damaged or badly connected and therefore does not operate after reset is released. However, the start clock of
the CPU is the internal high-speed oscillation clock, so the device can be started by the internal high-speed
oscillation clock after a reset release. As a result, reset sources can be detected by software and the minimum
amount of safety processing can be done during anomalies to ensure that the system terminates safely.
Because the CPU can be started without waiting for the X1 clock oscillation stabilization time, the total
performance can be improved.
When the power supply voltage is turned on, the clock generator operation is shown in Figure 5-14.
• High-speed system clock f
• Internal high-speed oscillation clock f
• 40 MHz internal high-speed oscillation clock f
Note
X1 clock f
External main system clock f
The 78K0R/IB3 doesn’t have the subsystem clock.
X
SUB
MAIN
Note
MX
CLK
EX
CHAPTER 5 CLOCK GENERATOR
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User’s Manual U19678EJ1V1UD
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