UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 699

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Notes 1. When changing the clock selected for f
Remarks 1. X: Don’t care
2. SAU can be operated at a fixed division ratio of the subsystem clock, regardless of the f
Register
SMR0n
value), do so after having stopped (serial channel stop register 0 (ST0) = 000FH) the operation of the
serial array unit (SAU). When selecting INTTM02 for the operation clock, also stop the timer array
unit TAUS (timer channel stop register 0 (TT0) = 00FFH).
(main system clock and sub system clock), by operating the interval timer for which f
selected as the count clock (setting TIS02 bit of the timer input select register 0 (TIS0) to 1) and
selecting INTTM02 by using the serial clock select register 0 (SPS0) in channel 2 of TAUS. When
changing f
CKS0n
2. n: Channel number (n = 2(78K0R/IB3 and 38-pin products of 78K0R/IC3), n = 0 to 2 (44-pin
0
1
and 48-pin products of 78K0R/IC3, 78K0R/ID3, and 78K0R/IE3) )
PRS
013
CLK
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
0
1
1
1
1
1
, however, SAU and TAUS must be stopped as described in Note 1 above.
PRS
012
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
0
0
0
0
1
Other than above
Table 13-2. Selection of Operation Clock
PRS
011
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
1
0
0
1
1
0
0
1
1
1
CHAPTER 13 SERIAL ARRAY UNIT
SPS0 Register
PRS
010
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
0
1
0
1
0
1
0
1
0
1
1
User’s Manual U19678EJ1V1UD
PRS
003
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
0
1
1
1
1
1
PRS
002
X
0
0
0
0
1
1
1
1
0
0
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
CLK
(by changing the system clock control register (CKC)
PRS
001
X
0
0
1
1
0
0
1
1
0
0
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
PRS
000
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
0
1
0
1
0
1
0
1
0
1
1
f
f
f
f
f
f
f
f
f
f
f
f
INTTM02
f
f
f
f
f
f
f
f
f
f
f
f
INTTM02
Setting prohibited
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
Operation Clock (f
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
2
3
4
5
6
7
8
9
10
11
2
3
4
5
6
7
8
9
10
11
Note2
Note2
f
20 MHz
10 MHz
5 MHz
2.5 MHz
1.25 MHz
625 kHz
313 kHz
156 kHz
78.1 kHz
39.1 kHz
19.5 kHz
9.77 kHz
20 MHz
10 MHz
5 MHz
2.5 MHz
1.25 MHz
625 kHz
313 kHz
156 kHz
78.1 kHz
39.1 kHz
19.5 kHz
9.77 kHz
CLK
MCK
= 20 MHz
)
Note 1
SUB
CLK
/4 has been
frequency
697