UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 243

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(PER0)
(PER0)
(PER1)
(PER2)
(PER2)
Bit 4
Bit 2
Bit 3
Bit 1
Bit 0
Note
Caution Be sure to clear the following bits to 0.
OACMPEN
TAUOPEN
IICAEN
SAU0EN
TAU0EN
0
1
0
1
0
1
0
1
0
1
Note
IICAEN bit is not provided in the 78K0R/IB3 and the 38-pin and 44-pin products of the
78K0R/IC3. In the 78K0R/IB3 and the 38-pin and 44-pin products of the 78K0R/IC3, bit 4
of PER0 register is fixed to 0.
• Bits 0, 1, 3, and 6 of the PER0 register
• Bits 0 to 2 and 4 to 7 of the PER1 register
• Bits 2 to 7 of the PER2 register
Figure 5-9. Format of Peripheral Enable Registers (2/2)
Stops input clock supply.
• SFR used by the serial interface IICA cannot be written.
• The serial interface IICA is in the reset status.
Stops input clock supply.
• SFR used by the serial array unit cannot be written.
• The serial array unit is in the reset status.
Stops input clock supply.
• SFR used by the comparator/programmable gain amplifier cannot be written.
• The comparator/programmable gain amplifier is in the reset status.
Stops input clock supply.
• SFR used by the inverter control function cannot be written.
• The inverter control function is in the reset status.
Stops input clock supply.
• SFR used by timer array unit TAUS cannot be written.
• Timer array unit TAUS is in the reset status.
Enables input clock supply.
• SFR used by the serial interface IICA can be read and written.
Enables input clock supply.
• SFR used by the serial array unit can be read and written.
Enables input clock supply.
• SFR used by the comparator/programmable gain amplifier can be read and written.
Enables input clock supply.
• SFR used by the inverter control function can be read and written.
Enables input clock supply.
• SFR used by timer array unit TAUS can be read and written.
(78K0R/IB3 : bits 0, 1, 3, 4, 6, 7, 38-pin and 44-pin products of 78K0R/IC3 : bits 0, 1,
3, 4, 6)
Control of comparator/programmable gain amplifier input clock supply
CHAPTER 5 CLOCK GENERATOR
User’s Manual U19678EJ1V1UD
Control of inverter control function input clock supply
Control of timer array unit TAUS input clock supply
Control of serial interface IICA input clock supply
Control of serial array unit input clock supply
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