UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 419

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 7-35. Example of Set Contents of Registers When Triangular Wave PWM Output Function with Dead
(a) Timer mode register n (TMRn)
(b) Other registers
TMRn
Notes 1.
Remark n = 00, 04
CKSn
1/0
TOE0:TOEn
TO0:TOn
TOM0:TOMn
TOT0:TOTn
TOL0:TOLn
TDE0:TDEn
TRE0:TREn
TRO0:TROn
TRC0:TRCn
TME0:TMEn
15
2.
Operation clock selection
0: Selects CK00 as operation clock of channel n.
1: Selects CK01 as operation clock of channel n.
14
0
Note 2
Set TOEn of the master channel to “1” in the following cases.
Note 1
CCS1n
• When an INTTMM0, INTTMV0, INTTMM1, or INTTMV1 interrupt signal is used
• When Hi-Z output is controlled or an A/D conversion trigger is selected via control by using
When MDn0 = 1, TOn = 0,
When MDn0 = 0, TOn = 1
13
0
the OPMR, OPHS, OPHT, and OPCR registers
CCSn0
0: Stops the TOn output operation by counting operation.
1: Enables the TOn output operation by counting operation.
0: Outputs a low level from TOn.
1: Outputs a high level from TOn.
0: Sets master channel output mode.
0: Sets 0 when TOMn = 0 (master channel output mode).
0: Sets 0 when TOMn = 0 (master channel output mode).
0: Stops dead time control.
0: Stops real-time output.
0: Sets 0 when TREn = 0 (stops real-time output).
0: Does not operate as the real-time output trigger generation channel.
0: Stops modulated output.
12
0
CHAPTER 7 INVERTER CONTROL FUNCTIONS
Count clock selection
TERn
MAS
00B: Selects operation clock.
11
1
Time (Master Channels 0, 4) Is Used
Slave/master selection
STSn2
1: Master channel
10
0
User’s Manual U19678EJ1V1UD
STSn1
9
0
Start trigger selection
STSn0
000B: Selects only software start.
0
8
CISn1
0
7
CISn0
0
6
Selection of TIn pin input edge
00B: Sets 00B because these are not used.
Operation mode of channel n
0000B: Interval timer
0
5
MDn4
0
4
Setting of operation when
counting is started
0: Neither generates INTTMn
1: Generates INTTMn and
MDn3
3
0
nor inverts timer output
when counting is started.
inverts timer output when
counting is started.
MDn2
2
0
MDn1
1
0
MDn0
1/0
0
417