UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 225

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.1 Functions of Clock Generator
The clock generator generates the clock to be supplied to the CPU and peripheral hardware.
The following three kinds of system clocks and clock oscillators are selectable.
(1) Main system clock
(2) Subsystem clock
Remark f
<1> X1 oscillator
<2> Internal high-speed oscillator
<3> 40 MHz internal high-speed oscillator
An external main system clock (f
external main system clock input can be disabled by executing the STOP instruction or setting of MSTOP.
As the main system clock, a high-speed system clock (X1 clock or external main system clock) or internal high-
speed oscillation clock can be selected by setting of MCM0 (bit 4 of the system clock control register (CKC)).
Furthermore, the 40 MHz high-speed oscillation clock can be selected by setting SELDSC (bit 2 of the 40 MHz
high-speed oscillation control register (DSCCTL)).
• XT1 clock oscillator
This circuit oscillates a clock of f
Oscillation can be stopped by setting XTSTOP (bit 6 of CSC).
This circuit oscillates a clock of f
Oscillation can be stopped by executing the STOP instruction or setting of MSTOP (bit 7 of the clock
operation status control register (CSC)).
This circuit oscillates clocks of f
with this internal high-speed oscillation clock.
instruction or setting HIOSTOP (bit 0 of CSC).
This circuit oscillates a clock of f
(DSCON) of the 40 MHz internal high-speed oscillation control register (DSCCTL) to 1. Oscillation can
be stopped by setting DSCON to 0.
After a reset release, the 8 MHz internal high-speed oscillator starts oscillating automatically. Afterward,
the 40 MHz internal high-speed oscillator starts oscillating when the DSCON bit of the DSCCTL register
has been set to 1.
f
f
f
f
X
IH
IH40
EX
SUB
:
:
:
: Subsystem clock frequency
: 40 MHz internal high-speed oscillation clock frequency
X1 clock oscillation frequency
Internal high-speed oscillation clock frequency
External main system clock frequency
Note
CHAPTER 5 CLOCK GENERATOR
EX
SUB
= 2 to 20 MHz) can also be supplied from the EXCLK/X2/P122 pin. An
IH
X
User’s Manual U19678EJ1V1UD
= 2 to 20 MHz by connecting a resonator to X1 and X2.
= 8 MHz (TYP.). After a reset release, the CPU always starts operating
= 32.768 kHz by connecting a 32.768 kHz resonator to XT1 and XT2.
IH40
= 40 MHz (TYP.). Oscillation can be started by setting bit 0
Oscillation can be stopped by executing the STOP
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