UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 872

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Notes
Maskable
870
Software
Reset
Interrupt
Type
1.
2.
3.
4.
The default priority determines the sequence of interrupts if two or more maskable interrupts, each having
the same priority, occur simultaneously. Zero indicates the highest priority and 41 indicates the lowest
priority.
Basic configuration types (A) to (C) correspond to (A) to (C) in Figure 17-1.
When bit 1 (LVIMD) of the low-voltage detection register (LVIM) is set to 1.
When the instruction code in FFH is executed.
Reset by the illegal instruction execution not issued by emulation with the in-circuit emulator or on-chip
debug emulator.
Default
Priority
Note 1
31
32
33
34
35
36
37
38
39
40
41
−
−
BRK
RESET
POC
LVI
WDT
TRAP
INTTM0
5
INTTM0
6
INTTM0
7
INTP6
INTP7/
INTTMO
FF1
INTTMM
1
INTTMV
1
INTTM0
8
INTTM0
9
INTTM1
0
INTTM1
1
Name
Interrupt Source
End of timer channel 5
count or capture
End of timer channel 6
count or capture
End of timer channel 7
count or capture
Pin input edge detection
Pin input edge
detection/timer Hi-Z
control interrupt 0
Timer array unit crest
interrupt signal detection
1
Timer array unit valley
interrupt signal detection
1
End of timer channel 8
count or capture
End of timer channel 9
count or capture
End of timer channel 10
count or capture
End of timer channel 11
count or capture
Execution of BRK
instruction
RESET pin input
Power-on-clear
Low-voltage detection
Overflow of watchdog
timer
Execution of illegal
instruction
Table 17-1. Interrupt Source List (3/3)
CHAPTER 17 INTERRUPT FUNCTIONS
Trigger
Note 4
User’s Manual U19678EJ1V1UD
Note 3
Internal
External
Internal
Internal/
External
−
−
0044H
0046H
0048H
004AH
004CH
004EH
0050H
0052H
0054H
0056H
0058H
007EH
0000H
Address
Vector
Table
figuration
Type
Basic
Con-
(A)
(B)
(A)
(C)
−
Note 2
√
√
√
−
−
√
√
√
√
√
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√
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√
√
√
√
√
√
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√
√
√
√
√
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√
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√
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