UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 750

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.7.4 Stop condition generation
released.
748
After all data are transmitted to or received from the target slave, a stop condition is generated and the bus is
(1) Processing flow
Note During a receive operation, the SOE02 bit of serial output enable register 0 (SOE0) is cleared to 0 before
SDA10 output
SCL10 output
SOE02
receiving the last data.
SE02
ST02
Note
Figure 13-103. Timing Chart of Stop Condition Generation
Figure 13-104. Flowchart of Stop Condition Generation
Operation
stop
CHAPTER 13 SERIAL ARRAY UNIT
Writing 1 to ST02 bit to clear
Starting generation of stop condition.
transmission/data reception
(SE02 bit is cleared to 0)
End of IIC communication
Writing 0 to SOE02 bit
Writing 1 to CKO02 bit
User’s Manual U19678EJ1V1UD
Writing 0 to SO02 bit
Writing 1 to SO02 bit
Completion of data
SO02
bit manipulation
Wait
Stop condition
CKO02
bit manipulation
SO02
bit manipulation
Operation is stopped
Secure a wait time so that the specifications of
I
2
C on the slave side are satisfied.