UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 628

no-image

UPD78F1233GB-GAH-AX

Manufacturer Part Number
UPD78F1233GB-GAH-AX
Description
MCU 16BIT 78K0R/LX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1233GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1233GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
626
Address: F0120H, F0121H
(10) Serial channel enable status register 0 (SE0)
Symbol
SE0
SE0 register indicates whether data transmission/reception operation of each channel is enabled or stopped.
When 1 is written a bit of serial channel start register 0 (SS0), the corresponding bit of this register is set to 1.
When 1 is written a bit of serial channel stop register 0 (ST0), the corresponding bit is cleared to 0.
Channel n that is enabled to operate cannot rewrite by software the value of CKO0n bit (serial clock output of
channel n) of the serial output register 0 (SO0) to be described below, and a value reflected by a
communication operation is output from the serial clock pin.
Channel n that stops operation can set the value of CKO0n bit of the SO0 register by software and output its
value from the serial clock pin. In this way, any waveform, such as that of a start condition/stop condition, can
be created by software.
SE0 register can be read by a 16-bit memory manipulation instruction.
The lower 8 bits of SE0 register can be set with an 1-bit or 8-bit memory manipulation instruction with SE0L.
Reset signal generation clears SE0 register to 0000H.
Remark n: Channel number (n = 0 to 3)
SE0
15
n
0
1
0
Operation stops
Operation is enabled.
Figure 13-13. Format of Serial Channel Enable Status Register 0 (SE0)
14
0
After reset: 0000H
13
0
12
0
CHAPTER 13 SERIAL ARRAY UNIT
11
0
Indication of operation enable/stop status of channel n
User’s Manual U19678EJ1V1UD
R
10
0
9
0
8
0
7
0
6
0
5
0
4
0
SE0
3
3
SE0
2
2
SE0
1
1
SE0
0
0

Related parts for UPD78F1233GB-GAH-AX