UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 838

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

836
(3) Stop condition
Notes 1. To cancel wait, write “FFH” to IICA or set WREL.
(When 8-Clock and 9-Clock Wait Is Selected for Master, 9-Clock Wait Is Selected for Slave) (3/3)
INTIICA
INTIICA
Transfer lines
Processing by master device
Processing by slave device
WREL
WREL
ACKD
ACKE
MSTS
ACKD
ACKE
MSTS
WTIM
WTIM
SDA0
SCL0
STD
SPD
TRC
STD
SPD
TRC
IICA
SPT
IICA
SPT
STT
STT
2. Write data to IICA, not setting WREL, in order to cancel a wait state during slave transmission.
3. If a wait state during slave transmission is canceled by setting WREL, TRC will be cleared.
Transmit
Receive
H
H
L
L
L
Figure 14-33. Example of Slave to Master Communication
IICA
D7
1
←
data
D6
2
CHAPTER 14 SERIAL INTERFACE IICA
Note 2
D5
3
User’s Manual U19678EJ1V1UD
D4
4
D3
5
D2
6
D1
7
D0
8
IICA
NACK
Note 1
9
← FFH
IICA
Note 3
Notes 1, 3
Note 1
← FFH
condition
Stop
Note 1
(When SPIE = 1)
(When SPIE = 1)
Receive
IICA
condition
Start
←
address
AD6
1