UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 282

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

280
(1) Peripheral enable register 2 (PER2)
Address: F00F2H
Symbol
This register is used to enable or disable supplying the clock to the peripheral hardware. Clock supply to a
hardware macro that is not used is stopped in order to reduce the power consumption and noise.
When timer array unit TAUS is used, be sure to set bit 0 (TAU0EN) of this register to 1.
When the inverter control function is used, be sure to set bit 1 (TAUOPEN) to 1. (For details of the inverter
control function, refer to CHAPTER 7 INVERTER CONTROL FUNCTIONS.)
PER2 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears PER2 to 00H.
Cautions 1. When setting timer array unit TAUS, be sure to set TAU0EN to 1 first. If TAU0EN = 0, writing
PER2
TAUOPEN
TAU0EN
2. Be sure to clear bits 2 to 7 of the PER2 register to 0.
7
0
0
1
0
1
to a control register of timer array unit TAUS is ignored, and all read values are default
values (except for timer input select register 0 (TIS0), input switch control register (ISC),
noise filter enable registers 1, 2 (NFEN1, NFEN2), port mode registers 0, 1, 3, 5, 7 (PM0,
PM1, PM3, PM5, PM7), port registers 0, 1, 3, 5, 7 (P0, P1, P3, P5, P7)). Similarly, when using
the inverter control function, set TAUOPEN to 1 first.
After reset: 00H
Figure 6-5. Format of Peripheral Enable Register 2 (PER2)
Stops input clock supply.
Enables input clock supply.
Stops input clock supply.
Enables input clock supply.
• SFR used by timer array unit TAUS cannot be written.
• Timer array unit TAUS is in the reset status.
• SFR used by timer array unit TAUS can be read/written.
• SFR used by the inverter control block cannot be written.
• The inverter control block is in the reset status.
• SFR used by the inverter control block can be read/written.
6
0
CHAPTER 6 TIMER ARRAY UNIT TAUS
R/W
5
0
User’s Manual U19678EJ1V1UD
Control of timer array unit TAUS input clock
Control of inverter control block input clock
4
0
3
0
2
0
TAUOPEN
<1>
TAU0EN
<0>